ZPSD301 datasheet(35/85 Pages) STMICROELECTRONICS

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PSD3XX Family

16.0

Power

Management

(cont.)

16.5 Composite Frequency of the Input Signals to the PAD Logic

The composite frequency of the input signals to the PADs is calculated by considering all

transitions on any PAD input signal (including the MCU address and control inputs). Once

you have calculated the composite frequency and know the number of product terms used,

you can determine the total AC current consumption of the PAD by using Figure 14 or

Figure 15. From the figures, notice that the DC component (f = 0 MHz) of PAD current is

essentially zero when the turbo feature is disabled, and that the AC component increases

as frequency increases.

When the turbo feature is disabled, the PAD logic can achieve low power consumption by

becoming active briefly, only when inputs change. For standard voltage (non-V) devices,

the PAD logic will stay active for 25 nsec after it detects a transition on any input. If there

are more transitions on any PAD input within the 25 nsec period, these transitions will not

add to power consumption because the PAD logic is already active. This effect helps

reduce the overall composite frequency value. In other words, narrowly spaced groups of

transitions on input signals may count as just one transition when estimating the composite

frequency.

Note that the “knee” frequency in Figure 14 is 40 MHz, which means that the PAD will

consume less power only if the composite frequency of all PAD inputs is less than 40 MHz.

When the composite frequency is above 40 MHz, the PAD logic never gets a chance to shut

down (inputs are spaced less than 25 nsec) and no power savings can be achieved. Figure

15 is for low-voltage devices in which the “knee” frequency is 20 MHz.

Take the following steps to calculate the composite frequency:

1) Determine your highest frequency input for either PAD A or PAD B.

2) Calculate the period of this input and use this period as a basis for determining the

composite frequency.

3) Examine the remaining PAD input signals within this base period to determine the

number of distinct transitions.

4) Signal transitions that are spaced further than 25 nsec apart count as a distinct transition

(50 nsec for low-voltage V devices). Signal transitions spaced closer than 25 nsec count

as the same transition.

5) Count up the number of distinct transitions and divide that into the value of the base

period.

6) The result is the period of the composite frequency. Divide into one to get the composite

frequency value.

Unfortunately, this procedure is complicated and usually not deterministic since different

inputs may be changing in various cycles. Therefore, we recommend you think of the

situation that has the most activity on the inputs to the PLD and use this to calculate the

composite frequency. Then you will have a number that represents your best estimate at

the worst case scenario.

Since this is a complicated process, the following example should help.

Example Composite Frequency Calculation

Suppose you had the following circuit:

80C31

(12 MHz

Crystal)

PSD3XX

AD0-AD7

Latched Address

Output (LA0 - LA7)

A8-A15

ALE

PSEN

CSI

3 Inputs: Int, Sel, Rdy

5 MCU I/O Outputs

3 Chip-Select Outputs

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