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STW5095 数据表(PDF) 32 Page - STMicroelectronics |
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STW5095 数据表(HTML) 32 Page - STMicroelectronics |
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32 / 69 page ![]() 4 Control Registers STw5095 32/69 4.6 Digital audio interfaces master mode and clock generators CR# (hex) Description D7 D6D5 D4 D3D2 D1D0 Def. CR20 (14h) DAOCK Frequency Ls byte DAOCKF(7:0) 0000 0000 CR21 (15h) DAOCK Frequency Ms byte DAOCKF(15:8) 0000 0000 CR22 (16h) DA Clock Generator Control X X DAMAST DAMASTGEN ENDAOCK DAOCK512 DAPCMF(1:0) 0000 0000 CR23 (17h) ADOCK Frequency Ls byte ADOCKF(7:0) 0000 0000 CR24 (18h) ADOCK Frequency Ms byte ADOCKF(15:8) 0000 0000 CR25 (19h) AD Clock Generator Control X X ADMAST ADMASTGEN ENADOCK ADOCK512 ADPCMF(1:0) 0000 0000 Bits Name CR21-20 Name CR24-23 Value CR21-20 and CR24-23 Description Def. 15-0 DAOCKF(15:0) ADOCKF(15:0) K The following formulas can be used to obtain the value of K for the desired FS or OCK respectively in the clock generator 0000h Note: CR21-20 and CR24-23 are meaningful in Master Mode Only. KFS () round 2 25 FS AMCK MCKCOEFF ⋅ -------------------------------------------------------------- ⎝⎠ ⎛⎞ = KOCK () roun d 2 25 OC K AMCK MCKCOEFF OSR ⋅ ⋅ ------------------------------------------------------------------------------------ ⎝⎠ ⎛⎞ = FS: Data Rate (DA_SYNC or AD_SYNC frequency in Master Mode) OCK: Oversampled Clock Frequency (DA_OCK or AD_OCK) AMCK: Input Master Clock Frequency MCKCOEFF: See CR30 for definition OSR: See bit 2 in CR22 and CR25 |
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