STW5095 datasheet(35/69 Pages) STMICROELECTRONICS

35 / 69 page

STw5095

4 Control Registers

35/69

Bits

Name

Value

CR28 Description

Def.

7AMCKINV

AMCK is inverted

AMCK is not inverted

6DACKP

DA Bit Clock Pin (DA_CK) polarity is inverted

DA Bit Clock Pin (DA_CK) polarity is not inverted

DASYNCP

DSP and PCM Formats in DA Interface

Non Delayed format

Delayed Format

Delayed, Left-aligned, Right-aligned and SPI Formats in DA Interface

DA Sync Pin (DA_SYNC) polarity is inverted

DA Sync Pin (DA_SYNC) polarity is not inverted

4DAMONO

Mono Mode: (L+R)/2 from Audio Interface is used on both DAC

channels

Stereo Mode

ADCKP

AD Bit Clock Pin (AD_CK) polarity is inverted

AD Bit Clock Pin (AD_CK) polarity is not inverted

ADSYNCP

DSP and PCM Formats in AD Interface

Non Delayed format

Delayed Format

Delayed, Left-aligned, Right-aligned and SPI Formats in AD

Interface

DA Sync Pin (DA_SYNC) polarity is inverted

DA Sync Pin (DA_SYNC) polarity is not inverted

1ADMONO

Mono Mode: (L+R)/2 from ADC is sent to both channels in the Audio

Interface

Stereo Mode

ADHIZ

AD data pin (AD_DATA) is in high impedance state when no data is

available

AD data pin (AD_DATA) is forced to 0 when no data is available

STW5095 数据表(PDF) 35 Page - STMicroelectronics

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