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STW4810 数据表(PDF) 63 Page - STMicroelectronics |
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STW4810 数据表(HTML) 63 Page - STMicroelectronics |
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63 / 72 page ![]() STw4810 5 Electrical and timing characteristics Rev3 63/72 Figure 14. Propagation and clock/data skew times TPHC Propagation time from Host to card Figure 14 7ns TPCH Propagation time from card to host Figure 14 7ns TSHC Clock /data skew time from host to card Figure 14 Reference is CLKOUT +/- 0.5 ns TSCH Clock /data skew time from card to host Figure 14 Reference is MMCLK +/- 0.5 ns TR Rise time 3 ns TF Fall time 3 ns C1LINE Between multimedia processor & STw4810 Bus line capacitance f < 52 Mhz 20(3) pF C2LINE Between STw4810 & MMC card Bus line capacitance f < 52 MHz 20 + 20(4) pF 1. Guaranteed by design 2. MMC interface pull up resistors are in EMIF06-HCM01F2 device (7 K Ω for CMD; 75 KΩ for Data wires) 3. 20 pF for equivalent board parasitic capacitance. 4. 20 pF for EMIF06 protection + 20 pF for board parasitic capacitance. Table 50. SD/MMC card interface Symbol Description Test conditions Min. Typ. Max. Units MCCLK MCCMD MCDATA[3:0] MCFBCLK t 50% 2 ns 2 ns 10% 90% 10% 90% t 50% TPHC CLKOUT CMDOUT DATAOUT[3:0] LATCHCLK TPHC MCCLK MCCMD MCDATA[3:0] MCFBCLK t 50% 2 ns 2 ns 10% 90% 10% 90% t 50% TPCH CLKOUT CMDOUT DATAOUT[3:0] LATCHCLK TPCH MCDATA[3:0] 2 ns 10% 90% TSHC MCCLK 50% CLKOUT DATAOUT[3:0] MCDATA[3:0] 2 ns 10% 90% TSCH MCCLK 50% CLKOUT DATAOUT[3:0] |
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