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STW4810 数据表(PDF) 10 Page - STMicroelectronics |
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STW4810 数据表(HTML) 10 Page - STMicroelectronics |
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10 / 72 page ![]() 3 Ball information STw4810 10/72 Rev3 F3 LATCHCLK DI(VMMC) Pull Down 1.5M Ω Host feedback clock to STw4810, to re- synchronize data in processor. G1 CLKOUT DO(VMMC) Host clock, between STw4810 and card (processor clock). F2 CMDOUT DIO(VMMC) Pull Up 1.5M Ω Bidirectional command/response signal between STw4810 and processor. E1 DATAOUT0 DIO(VMMC) Pull Up 1.5M Ω Bidirectional data0 between STw4810 and card F1 E3 E2 DATAOUT[3:1] DIO(VMMC) Pull Up 1.5M Ω Bidirectional data[3:1] between STw4810 and card. J4 VBAT_MMC VDDA-VBAT Battery supply for VMMC K5 VMMC AIO VMMC supply output Other balls J5 GPO1 AO General purpose output K6 GPO2 AO General purpose output B9 D3 “Reserved” G To be connected to ground B1 B7 B8 C5 F8 G8 K10 “Reserved” O To be left open Table 2. STw4810 balls function Ball Ball name Ball type Description |
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