STW4810 datasheet(32/72 Pages) STMICROELECTRONICS

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4 Functional description

STw4810

32/72

Rev3

4.3.4

VPLL

This LDO is dedicated to the multimedia processor PLL (1.05 V, 1.2 V, 1.3 V, 1.8 V) power

supply with 10 mA max full load (Power Control Registers -

Table 26 and Table 27).

Main features

●

Programmable output voltage, (VPLL_SEL[1:0] bits of power control register -

Table 26

and

Table 27)

●

Two power domains:

–

‘Normal mode’ 10 mA full load

–

‘Power Down mode’ or ‘Standby Mode’ when regulators are switched off and there is

no power consumption (EN_VPLL bit of power control register -

Table 27)

●

Soft start circuitry at start up, from power off to normal mode, when PON ball changes

from “0” to “1”.

●

Default setting defined by start-up configuration.

4.3.5

VANA

This LDO is dedicated to the multimedia processor analogue function (2.5 V) power supply with

10 mA full load.

Main features:

●

2.5 V output voltage,

●

Two power domains

–

‘Normal mode’ 10 mA full load

–

‘Power Down mode’ or ‘Standby Mode’ when regulators are switched off and there is

no power consumption (EN_VANA bit of Power control register -

Table 28),

●

Default setting defined by start-up configuration.

4.3.6

VAUX

This LDO is dedicated either to the multimedia processor input/output signals or to the auxiliary

devices. Power supply values are 1.5 V,1.8 V, 2.5 V, 2.8 V with 150 mA full load and 0.5 mA in

SLEEP mode. In case of 1.5 V on the output, this LDO can be supplied by using VIO_VMEM

DC/DC converter (1.8 V). One pad feed-back is used.

Main features:

●

Programmable output voltage, 4 levels

(VAUX_SEL[1:0] bits of Power control register -

Table 26)

●

Three power domains:

–

‘Normal mode’ when multimedia processor is in run mode, 150 mA full load

–

‘Low current mode’ when multimedia processor is in sleep mode, 0.5 mA current

capability.

Fast switching from low current to normal mode.

Note:

Definition of SLEEP mode is given in 4.2.3: SLEEP mode section.

–

‘Power down mode’ or ‘standby mode’ when regulator is switched off, no power

consumption (PDN_VAUX bit of SD MMC control register -

Table 17)

●

Default setting defined by start-up configuration

STW4810 数据表(PDF) 32 Page - STMicroelectronics

STW4810 数据表(HTML) 32 Page - STMicroelectronics

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