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AT25QL641 数据表(PDF) 4 Page - Dialog Semiconductor |
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AT25QL641 数据表(HTML) 4 Page - Dialog Semiconductor |
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4 / 77 page ![]() 3 AT25QL641 DS-25QL641–130E–10/2018 2. Pinouts and Pin Descriptions The following figures show the available package types. During all operations, V CC must be held stable and within the specified valid range: VCC (min) to VCC (max). All of the input and output signals must be held high or low (according to voltages of VIH, VOH, VIL or VOL). Figure 1-1. 8-SOIC (Top View) Figure 1-2. 8-UDFN (Top View) Figure 1-3. 8-WLCSP (Bottom View) 1 2 3 4 8 7 6 5 CS SO (IO 1) WP (IO 2, ACC) GND VCC HOLD (IO 3) SCK SI (IO 0) CS SO (IO 1) WP (IO 2, ACC) GND 1 2 3 4 8 7 6 5 VCC HOLD (IO 3) SCK SI (IO 0) Vcc CS I/O 1(SO) I/O 3(HOLD) SCK I/O 2(WP) GND I/O 0(SI) NC NC NC NC |
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