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PCF85363ATL/AX 数据表(PDF) 38 Page - NXP Semiconductors |
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PCF85363ATL/AX 数据表(HTML) 38 Page - NXP Semiconductors |
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38 / 86 page ![]() NXP Semiconductors PCF85363A Tiny Real-Time Clock/calendar with 64 byte RAM, alarm function, battery switch-over time stamp input, and I2C-bus Bit Symbol Value Description 0[1] normal 1 reduced CLK output jitter; increase IDD Table 32. LOWJ bit - oscillator control register (address 25h)...continued [1] Default value. Oscillator circuits suffer from jitter. In particular, ultra low-power oscillators like the one used in the PCF85363A are optimized for power and not jitter. By setting the LOWJ bit, the jitter performance can be improved at the cost of power consumption. 7.10.5 OSCD[1:0]: quartz oscillator drive control Bit Symbol Value Description oscillator drive bits 00[1] normal drive; RS(max): 100 kΩ 01 low drive; RS(max): 60 kΩ; reduced IDD 3 to 2 OSCD[1:0] 10, 11 high drive; RS(max): 500 kΩ; increased IDD Table 33. OSCD[1:0] bits - oscillator control register (address 25h) [1] Default value. The oscillator is designed to be used with quartz with a series resistance up to 100 kΩ. This covers the typical range of 32.768 kHz quartz crystals. Series resistance is also referred to as: ESR, motional resistance, or RS. A low drive mode is available for low series resistance quartz. This reduces the current consumption. For very high series resistance quartz, there is a high drive mode. Current consumption increases substantially in this mode. 7.10.6 CL[1:0]: quartz oscillator load capacitance Bit Symbol Value Description internal oscillator capacitor selection for quartz crystals with the corresponding load capacitance of CL: 00[1] 7.0 pF 01 6.0 pF 10 12.5 pF 1 to 0 CL[1:0] 11 12.5 pF Table 34. CL[1:0] bits - oscillator control register (address 25h) [1] Default value. CL refers to the load capacitance of the oscillator circuit and allows for a certain amount of package and PCB parasitic capacitance. When the oscillator circuit matches the CL parameter of the quartz, then the frequency offset is zero. PCF85363A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 3.1 — 18 June 2021 38 / 86 |
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