ST25DV64K datasheet(198/200 Pages) STMICROELECTRONICS

198 / 200 page

List of figures

Figure 1.

ST25DVxxx block diagram ............................................................ 3

Figure 2.

ST25DVxxx 8-pin packages connections with open drain Interruption Output ......................... 4

Figure 3.

ST25DVxxx 12-pin package connections with Cmos interrupt output (GPO) .......................... 5

Figure 4.

ST25DVxxx 10-ball WLCSP package connections with Cmos interrupt output (GPO) ................... 5

Figure 5.

ST25DVxxx power-up sequence (No RF field, LPD pin tied to VSS or package without LPD pin) ............ 8

Figure 6.

ST25DVxxx RF power-up sequence (No DC supply) .......................................... 9

Figure 7.

Memory organization ............................................................... 11

Figure 8.

ST25DVxxx user memory areas ....................................................... 13

Figure 9.

RF to I2C fast transfer mode operation................................................... 24

Figure 10.

I2C to RF fast transfer mode operation................................................... 25

Figure 11.

Fast transfer mode mailbox access management. ........................................... 27

Figure 12.

RF_USER chronogram ............................................................. 28

Figure 13.

RF_ACTIVITY chronogram .......................................................... 29

Figure 14.

RF_INTERRUPT chronogram......................................................... 30

Figure 15.

FIELD_CHANGE chronogram ........................................................ 31

Figure 16.

RF_PUT_MSG chronogram .......................................................... 32

Figure 17.

RF_GET_MSG chronogram .......................................................... 33

Figure 18.

RF_WRITE chronogram ............................................................ 34

Figure 19.

EH delivery state diagram ........................................................... 43

Figure 20.

ST25DVxxx Energy Harvesting Delivery Sequence .......................................... 44

Figure 21.

ST25DVxxx, Arbitration between RF and I2C .............................................. 47

Figure 22.

RF security sessions management ..................................................... 57

Figure 23.

I2C security sessions management ..................................................... 58

Figure 24.

I2C bus protocol .................................................................. 64

Figure 25.

I²C timeout on Start condition ......................................................... 65

Figure 26.

Write mode sequences when write is not inhibited ........................................... 68

Figure 27.

Write mode sequences when write is inhibited ............................................. 68

Figure 28.

Write cycle polling flowchart using ACK .................................................. 69

Figure 29.

Read mode sequences ............................................................. 71

Figure 30.

I2C Present Password Sequence ...................................................... 72

Figure 31.

I2C Write Password Sequence ........................................................ 73

Figure 32.

ST25DVxxx protocol timing .......................................................... 75

Figure 33.

ST25DVxxx state transition diagram .................................................... 76

Figure 34.

Stay Quiet frame exchange between VCD and ST25DVxxx .................................... 85

Figure 35.

Read Single Block frame exchange between VCD and ST25DVxxx............................... 86

Figure 36.

Extended Read Single Block frame exchange between VCD and ST25DVxxx ....................... 87

Figure 37.

Write Single Block frame exchange between VCD and ST25DVxxx ............................... 88

Figure 38.

Extended Write Single frame exchange between VCD and ST25DVxxx ............................ 90

Figure 39.

Lock Block frame exchange between VCD and ST25DVxxx .................................... 91

Figure 40.

Extended Lock block frame exchange between VCD and ST25DVxxx ............................. 92

Figure 41.

Read Multiple Block frame exchange between VCD and ST25DVxxx ............................. 93

Figure 42.

Extended Read Multiple Block frame exchange between VCD and ST25DVxxx ...................... 95

Figure 43.

Write Multiple Block frame exchange between VCD and ST25DVxxx.............................. 96

Figure 44.

Extended Write Multiple Block frame exchange between VCD and ST25DVxxx ...................... 98

Figure 45.

Select frame exchange between VCD and ST25DVxxx ....................................... 99

Figure 46.

Reset to Ready frame exchange between VCD and ST25DVxxx................................ 100

Figure 47.

Write AFI frame exchange between VCD and ST25DVxxx .................................... 102

Figure 48.

Lock AFI frame exchange between VCD and ST25DVxxx .................................... 103

Figure 49.

Write DSFID frame exchange between VCD and ST25DVxxx.................................. 104

Figure 50.

Lock DSFID frame exchange between VCD and ST25DVxxx .................................. 105

Figure 51.

Get System Info frame exchange between VCD and ST25DVxxx ............................... 107

ST25DV04K ST25DV16K ST25DV64K

List of figures

DS10925 - Rev 9

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ST25DV64K 数据表(PDF) 198 Page - STMicroelectronics

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