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M76DW52003BA 数据表(PDF) 17 Page - STMicroelectronics |
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M76DW52003BA 数据表(HTML) 17 Page - STMicroelectronics |
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17 / 27 page  17/27 M76DW52003TA, M76DW52003BA Table 8. SRAM Read AC Characteristics Note: 1. Sampled only. Not 100% tested. Symbol Alt Parameter SRAM Unit Min Max tAVAV tRC Read Cycle Time 70 ns tAVQV tACC Address Valid to Output Valid 70 ns tAXQX tOH Address Transition to Output Transition 10 ns tBHQZ tBHZ UBS, LBS Disable to Hi-Z Output 25 ns tBLQV tAB UBS, LBS Access Time 70 ns tBLQX tBLZ UBS, LBS Enable to Low-Z Output 5ns tE1LQV tE2HQV tACS1 Chip Enable 1 Low or Chip Enable 2 High to Output Valid 70 ns tE1LQX tE2HQX tCLZ1 Chip Enable 1 Low or Chip Enable 2 High to Output Transition 10 ns tE1HQZ tE2LQZ tHZCE Chip Enable High or Chip Enable 2 Low to Output Hi-Z 25 ns tGHQZ tOHZ Output Enable High to Output Hi-Z 25 ns tGLQV tOE Output Enable Low to Output Valid 35 ns tGLQX tOLZ Output Enable Low to Output Transition 5 ns tPD (1) Chip Enable 1 High or Chip Enable 2 Low to Power Down 70 ns tPU (1) Chip Enable 1 Low or Chip Enable 2 High to Power Up 0 ns |
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