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M76DW52003BA 数据表(PDF) 21 Page - STMicroelectronics |
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M76DW52003BA 数据表(HTML) 21 Page - STMicroelectronics |
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21 / 27 page  21/27 M76DW52003TA, M76DW52003BA Table 9. SRAM Write AC Characteristics Symbol Alt Parameter SRAM Unit Min Max tAVAV tWC Write Cycle Time 70 ns tAVE1L, tAVE2H, tAVWL, tAVBL tAS Address Valid to Beginning of Write 0 ns tAVE1H, tAVE2L tAW Address Valid to Chip Enable 1 Low or Chip Enable 2 High 60 ns tAVWH tAW Address Valid to Write Enable High 60 ns tBLWH tBLE1H tBLE2L tAVBH tBW UBS, LBS Valid to End of Write 60 ns tBLBH tBW UBS, LBS Low to UBS, LBS High 60 ns tDVE1H, tDVE2L, tDVWH tDVBH tDW Input Valid to End of Write 30 ns tE1HAX, tE2LAX, tWHAX tBHAX tWR End of Write to Address Change 0 ns tE1HDZ, tE2LDZ, tWHDZ tBHDZ tHD Address Transition to End of Write 0 ns tE1LE1H, tE1LBH tE1LWH tCW1 Chip Enable 1 Low to End of Write 60 ns tE2HE2L, tE2HBH, tE2HWH tCW2 Chip Enable 2 High to End of Write 60 ns tGHQZ tGHZ Output Enable High to Output Hi-Z 25 ns tWHQX tDH Write Enable High to Input Transition 5 ns tWLBH tWP Write Enable Low to UBS, LBS High 50 ns tWLQZ tWHZ Write Enable Low to Output Hi-Z 25 ns tWLWH tWLE1H tWLE2L tWP Write Enable Pulse Width 50 ns |
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