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PPC5604BAMLL4R 数据表(PDF) 55 Page - NXP Semiconductors |
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PPC5604BAMLL4R 数据表(HTML) 55 Page - NXP Semiconductors |
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55 / 109 page ![]() Package pinouts and signal descriptions MPC5604B/C Microcontroller Data Sheet, Rev. 15 NXP Semiconductors 55 The |ΔVDD(STDBY)| and dVDD(STDBY)/dt system requirement can be used to define the component used for the VDD supply generation. The following two examples describe how to calculate capacitance size: Example 1. No regulator (worst case) The |ΔVDD(STDBY)| parameter can be seen as the VDD voltage drop through the ESR resistance of the regulator stability capacitor when the IDD_BV current required to load VDD_LV domain during the standby exit. It is thus possible to define the maximum equivalent resistance ESRSTDBY(MAX) of the total capacitance on the VDD supply: ESRSTDBY(MAX) = |ΔVDD(STDBY)|/IDD_BV = (30 mV)/(300 mA) = 0.1Ω 1 The dVDD(STDBY)/dt parameter can be seen as the VDD voltage drop at the capacitance pin (excluding ESR drop) while providing the IDD_BV supply required to load VDD_LV domain during the standby exit. It is thus possible to define the minimum equivalent capacitance CSTDBY(MIN) of the total capacitance on the VDD supply: CSTDBY(MIN) = IDD_BV/dVDD(STDBY)/dt = (300 mA)/(15 mV/µs) = 20 µF This configuration is a worst case, with the assumption no regulator is available. IULPREG SR — Ultra low power regulator current provided to VDD_LV domain —— — 5 mA IULPREGINT CC D Ultra low power regulator module current consumption IULPREG = 5 mA; TA = 55 °C —— 100 µA IULPREG = 0 mA; TA = 55 °C — 2— IDD_BV CC D In-rush average current on VDD_BV during power-up5 —— — 3006 mA 1 V DD = 3.3 V ± 10% / 5.0 V ± 10%, TA = −40 to 125 °C, unless otherwise specified 2 This capacitance value is driven by the constraints of the external voltage regulator supplying the V DD_BV voltage. A typical value is in the range of 470 nF. 3 This value is acceptable to guarantee operation from 4.5 V to 5.5 V 4 External regulator and capacitance circuitry must be capable of providing I DD_BV while maintaining supply VDD_BV in operating range. 5 In-rush average current is seen only for short time (maximum 20 µs) during power-up and on standby exit. It is dependant on the sum of the CREGn capacitances. 6 The duration of the in-rush current depends on the capacitance placed on LV pins. BV decoupling capacitors must be sized accordingly. Refer to IMREG value for minimum amount of current to be provided in cc. 1. Based on typical time for standby exit sequence of 20 µs, ESR(MIN) can actually be considered at ~50 kHz. Table 25. Voltage regulator electrical characteristics (continued) Symbol C Parameter Conditions1 Value Unit Min Typ Max |
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