USB7002TSLASHKDX datasheet(6/56 Pages) MICROCHIP

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USB7002

DS00002670G-page 6

 2022 Microchip Technology Inc. and its subsidiaries

2.0

INTRODUCTION

2.1

General Description

The Microchip USB7002 hub is low-power, OEM configurable, USB 3.2 Gen 1 hub controller with 4 downstream ports

and advanced features for embedded USB applications. The USB7002 is fully compliant with the Universal Serial Bus

Revision 3.2 Specification and USB 2.0 Link Power Management Addendum. The USB7002 supports 5 Gbps Super-

Speed (SS), 480 Mbps Hi-Speed (HS), 12 Mbps Full-Speed (FS), and 1.5 Mbps Low-Speed (LS) USB downstream

devices on two standard USB 3.2 Gen 1 downstream ports and only legacy speeds (HS/FS/LS) on two standard USB

2.0 downstream ports.

The USB7002 supports native Type-C connectivity on the upstream port and two of the downstream ports. The hub

includes internal Type-C CC pin logic and an internal USB 3.2 Gen 1 multiplexer to support both Type-C insertion ori-

entations.

The USB7002 supports the legacy USB speeds (HS/FS/LS) through a dedicated USB 2.0 hub controller that is the cul-

mination of six generations of Microchip hub feature controller design and experience with proven reliability, interoper-

ability, and device compatibility. The SuperSpeed hub controller operates in parallel with the USB 2.0 controller,

decoupling the 5 Gbps SS data transfers from bottlenecks due to the slower USB 2.0 traffic.

The USB7002 enables OEMs to configure their system using “Configuration Straps.” These straps simplify the config-

uration process assigning default values to USB 3.2 Gen 1 ports and GPIOs. OEMs can disable ports, enable battery

charging and define GPIO functions as default assignments on power up.

The USB7002 supports downstream battery charging. The USB7002 integrated battery charger detection circuitry sup-

ports the USB-IF Battery Charging (BC1.2) detection method and most Apple devices. The USB7002 provides the bat-

tery charging handshake and supports the following USB-IF BC1.2 charging profiles:

• DCP: Dedicated Charging Port (Power brick with no data)

• CDP: Charging Downstream Port (1.5A with data)

• SDP: Standard Downstream Port (0.5A with data)

• Custom profiles loaded via SPI EEPROM or OTP

Additionally, the USB7002 includes many powerful and unique features such as:

The Hub Feature Controller, an internal USB device dedicated for use as a USB to I2C/UART/SPI/GPIO interface that

allows external circuits or devices to be monitored, controlled, or configured via the USB interface.

Multi-Host Endpoint Reflector, which provides unique USB functionality whereby USB data can be “mirrored” between

two USB hosts (Multi-Host) in order to perform a single USB transaction.This capability is fully covered by Microchip

intellectual property (U.S. Pat. Nos. 7,523,243 and 7,627,708) and is instrumental in enabling Apple CarPlay™, where

the Apple iPhone® becomes a USB Host.

FlexConnect, which provides flexible connectivity options. Any one of the USB7002’s downstream ports can be recon-

figured to become the upstream port, allowing master capable devices to control other devices on the hub.

AEC-Q100 compliance:, which tailors the device for use in automotive applications requiring automotive grade robust-

ness, starting with the comprehension of proprietary design for reliability techniques within the silicon IC itself, as well

as for the package design.

• Automotive qualified technologies and processes are used to fabricate the products with enhanced monitors to

continuously drive improvements in accordance with Microchip's zero-dpm methodology.

• Product qualification is focused on customer expectations and exceeds many of the automotive reliability stan-

dards including AEC-Q100.

• Microchip automotive services are provided during the life of the product from a dedicated organization of opera-

tions, quality, and product support personnel specialized in meeting the requirements of the automotive customer.

PortSwap, which adds per-port programmability to USB differential-pair pin locations. PortSwap allows direct alignment

of USB signals (D+/D-) to connectors to avoid uneven trace length or crossing of the USB differential signals on the

PCB.

PHYBoost, which provides programmable levels of Hi-Speed USB signal drive strength

in the downstream port transceivers. PHYBoost attempts to restore USB signal integrity

in a compromised system environment. The graphic on the right shows an example of

Hi-Speed USB eye diagrams before and after PHYBoost signal integrity restoration. in

a compromised system environment.

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