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USB7002T/KDX 数据表(PDF) 13 Page - Microchip Technology

部件名 USB7002T/KDX
功能描述  4-Port USB 3.2 Gen 1 SmartHub??IC
PDF  56 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

USB7002T/KDX 数据表(HTML) 13 Page - Microchip Technology

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 2022 Microchip Technology Inc. and its subsidiaries
DS00002670G-page 13
USB7002
Downstream
Port 1 Type-C
CC2
DP1_CC2
I/O12
Used for Type-C attach and orientation detection on Port
1. Includes configurable Rp/Ra selection. Connect this
pin directly to the CC2 pin of the respective Type-C con-
nector.
Downstream
Port 2 Type-C
Voltage Monitor
DP2_VBUS_MON
I/O12
Used for detect Type-C VBUS vSafe5V and vSafe0V
states on Port 2. A potential divider is needed for this pin
(44.2 k
to 49.9 k, 1.0%).
Downstream
Port 2 Type-C
CC1
DP2_CC1
I/O12
Used for Type-C attach and orientation detection on Port
2. Includes configurable Rp/Ra selection. Connect this
pin directly to the CC1 pin of the respective Type-C con-
nector.
Downstream
Port 2 Type-C
CC2
DP2_CC2
I/O12
Used for Type-C attach and orientation detection on Port
2. Includes configurable Rp/Ra selection. Connect this
pin directly to the CC2 pin of the respective Type-C con-
nector.
Upstream
Type-C CC1
CC1_UP
I/O12
Used for Type-C attach and orientation detection.
Includes configurable Rp/Ra selection.
Upstream
Type-C CC2
CC2_UP
I/O12
Used for Type-C attach and orientation detection.
Includes configurable Rp/Ra selection.
Upstream
Type-C Voltage
Monitor
VBUS_MON_UP
I/O12
Used to detect Type-C VBUS vSafe5V and vSafe0V
states on the upstream port. A potential divider is
needed for this pin (44.2 k
to 49.9 k, 1.0%).
Miscellaneous
Programmable
Function Pins
PF[31:4]
I/O12
Programmable function pins.
Refer to Section 3.3, Configuration Straps and Program-
mable Functions for details.
Reset Input
RESET_N
IS
This active low signal is used by the system to reset the
device.
Bias Resistor
RBIAS
I-R
A 12.0 k
 1.0% resistor is attached from ground to this
pin to set the transceiver’s internal bias settings. Place
the resistor as close the device as possible with a dedi-
cated, low impedance connection to the ground plane.
Test 1
TEST1
A
Test 1 pin.
This signal is used for test purposes and must always
be pulled-up to 3.3V via a 4.7 k
resistor.
Test 2
TEST2
A
Test 2 pin.
This signal is used for test purposes and must always
be pulled-down to ground via a 4.7 k
resistor.
Test 3
TEST3
A
Test 3 pin.
This signal is used for test purposes and must always
be pulled-down to ground via a 4.7 k
resistor.
TABLE 3-1:
PIN DESCRIPTIONS (CONTINUED)
Name
Symbol
Buffer
Type
Description



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