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PPC5606BAVLL6R 数据表(PDF) 40 Page - NXP Semiconductors |
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PPC5606BAVLL6R 数据表(HTML) 40 Page - NXP Semiconductors |
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40 / 114 page ![]() MPC5607B Microcontroller Data Sheet, Rev. 10 Electrical characteristics NXP Semiconductors 40 4.5 Thermal characteristics 4.5.1 External ballast resistor recommendations External ballast resistor on VDD_BV pin helps in reducing the overall power dissipation inside the device. This resistor is required only when maximum power consumption exceeds the limit imposed by package thermal characteristics. As stated in Table 14 LQFP thermal characteristics, considering a thermal resistance of 144 LQFP as 48.3 °C/W, at ambient temperature TA = 125 °C, the junction temperature Tj will cross 150 °C if the total power dissipation is greater than (150 – 125)/48.3 = 517 mW. Therefore, the total device current IDDMAX at 125 °C/5.5 V must not exceed 94.1 mA (i.e., PD/VDD). Assuming an average IDD(VDD_HV) of 15–20 mA consumption typically during device RUN mode, the LV domain consumption IDD(VDD_BV) is thus limited to IDDMAX –IDD(VDD_HV), i.e., 80 mA. Therefore, respecting the maximum power allowed as explained in 4.5.2, Package thermal characteristics, it is recommended to use this resistor only in the 125 °C/5.5 V operating corner as per the following guidelines: •If IDD(VDD_BV) < 80 mA, then no resistor is required. • If 80 mA < IDD(VDD_BV) < 90 mA, then 4 Ω resistor can be used. •If IDD(VDD_BV) > 90 mA, then 8 Ω resistor can be used. Using resistance in the range of 4–8 Ω, the gain will be around 10–20% of total consumption on VDD_BV. For example, if 8 Ω resistor is used, then power consumption when IDD(VDD_BV) is 110 mA is equivalent to power consumption when IDD(VDD_BV) is 90 mA (approximately) when resistor not used. In order to ensure correct power up, the minimum VDD_BV to be guaranteed is 30 ms/V. If the supply ramp is slower than this value, then LVDHV3B monitoring ballast supply VDD_BV pin gets triggered leading to device reset. Until the supply reaches certain threshold, this low voltage detector (LVD) generates destructive reset event in the system. This threshold depends on the maximum IDD(VDD_BV) possible across the external resistor. 4.5.2 Package thermal characteristics Table 14. LQFP thermal characteristics1 Symbol C Parameter Conditions2 Pin count Value Unit Min Typ Max RθJA CC D Thermal resistance, junction-to-ambient natural convection3 Single-layer board — 1s 100 — — 64 °C/W 144 — — 64 176 — — 64 Four-layer board — 2s2p 100 — — 49.7 144 — — 48.3 176 — — 47.3 |
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