AX88872P datasheet(14/36 Pages) ASIX

14 / 36 page

ASIX ELECTRONICS CORPORATION

CONFIDENTIAL

AX88872P Swipeater Controller

PRELIMINARY

2.7 Miscellaneous

Signal Name

Type Pin No.

Description

LCLK

Local Clock : 50-66Mhz. Used for system operation synchronous.

/RST

Reset : Active Low

The chip is reset when this signal is asserted Low

REF_CLK

Reference clock : The input is a continuous clock at 50Mhz for timing

reference with RMII interface.

DAISY_IN

I/PU

Repeater Identification Number Daisy-Chain In : When MODE=” 1” ,

This pin is a daisy chain serial input for Repeater ID. The State machines

always monitors the input if a correct data (RID) present at the pin, the

(RID+1) will be written to RID register and override the power on setup RID

for the chip.

DAISY_OUT

O/ML

Repeater Identification Number Daisy-Chain Out : When MODE=” 1” ,

This pin is periodically shift out the RID of itself to the next chained chip to

inform that this ID has already been occupied. The RID is shift out

periodically every about 200us.

MDIO

I/O

Station Management Data In/Out : For setup PHY auto-negotiation

registers. A burst write commands are issue to setup PHY register after reset.

The PHY address 4h, 5h, 6h, 7h, 8h, 9h,Ah and Bh will be written as register

4h to value 00A1h ( Advertise register set to 10/100 half-duplex mode)and

more information.

MDC

Station Management Data Clock Out : For MDIO reference clock.

/TEST

I/PU

Test Pin : Active LOW

The pin is just for test mode setting purpose only. Must be pull high when

normal operation.

157

NC : Keep no connection

VDD

25, 48

69, 92

122, 144

107, 120

POWER : +3.3V +/-5%

VSS

8, 35

67, 71

83, 101

112,115

127, 139

149, 174

185, 208

POWER: 0V

AX88872P 数据表(PDF) 14 Page - ASIX Electronics Corporation

AX88872P 数据表(HTML) 14 Page - ASIX Electronics Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36

数据表下载