AX88872P datasheet(16/36 Pages) ASIX

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ASIX ELECTRONICS CORPORATION

CONFIDENTIAL

AX88872P Swipeater Controller

PRELIMINARY

1 : Disable flow control function.

/ FlowCtl _En2

STXD0[2]

P2 Flow Control Enable : Enable flow control function of switch port 2

(Link to 100Mbps repeater port), back pressure for half duplex.

0 : Enable flow control function.

1 : Disable flow control function.

/ FlowCtl _En1

STXD0[1]

P1 Flow Control Enable : Enable flow control functions of switch port 1,

802.3x for full duplex, back pressure for half duplex.

0 : Enable flow control function.

1 : Disable flow control function.

/FlowCtl_En0

STXD0[0]

P0 Flow Control Enable : Enable flow control function of switch port 0,

802.3x for full duplex, back pressure for half duplex.

0 : Enable flow control function.

1 : Disable flow control function.

Speed_S2

TXD7[1]

Speed Setting for Repeater Port 0 to Port 7 :

0 : SPEED0~7 pin is Low for 10M,high for 100M

1 : SPEED0~7 pin is Low for 100M,high for 10M

Speed_S1

STXD1[2]

Speed Setting for Switch Port 1 : It is useful for switch port 1 in RMII mode

Don’t care the setting when switch port 1 is in MII mode.

0 : SCOL_SP1 pin is Low for 10M,high for 100M

1 : SCOL_SP1 pin is Low for 100M,high for 10M

Speed_S0

STXD1[1]

Speed Setting for Switch Port 0 : It is useful for switch port 0 in RMII mode

Don’t care the setting when switch port 0 is in MII mode.

0 : SCOL_SP0 pin is Low for 10M,high for 100M

1 : SCOL_SP0 pin is Low for 100M,high for 10M

FdpxHi_S1

STXD1[0]

Duplex Setting for Switch Port 1 : Switch Port 1 “SDUPLEX1”

function select

0 : SDUPLEX1 pin is low for half duplex,high for full duplex

1 : SDUPLEX1 pin is low for full duplex,high for half duplex

FdpxHi_S0

STXEN1

Duplex Setting for Switch Port 0 : Switch Port 0 “SDUPLEX0” pin function

selection

0 : SDUPLEX0 pin is low for half duplex,high for full duplex

1 : SDUPLEX0 pin is low for full duplex,high for half duplex

LRID_S1

LRID_S0

TXD5[1]

TXD5[0]

Local Repeater ID Selection :

LRID_S1

LRID_S0

LRID No.

reserved

/871_En

TXEN6

AX88871A Compatible Enable :

0 : Enable AX88871A compatible mode

1 : Disable AX88871A compatible mode

/RdPhy_En

TXD6[0]

MDIO read PHY Register 05h Information

0 : Enable

1 : Disable

WrPhyNo_S

TXD4[1]

MDIO Write PHY Number Selection

1 : MDIO Write 8 PHY address

0 : MDIO Write 6 PHY address ( for 6R+2S application )

WrPhyRegNo_S

TXD4[0]

MDIO Write PHY Register Number Selection

0 : MDIO Write 2 Registers ( 04h, 00h )

1 : MDIO Write 3 Registers ( 10h, 04h, 00h )

WrPhyStrAddr

TXD3[1]

MDIO Write PHY Starting Address

0 : MDIO Write PHY from address 18h ( 18h to 1Fh )

1 : MDIO Write PHY from address 04h ( 04h to 0Bh )

PktLenOpt

TXD3[0]

Maximun Packet Length Selection

0 : 1522 Byte

AX88872P 数据表(PDF) 16 Page - ASIX Electronics Corporation

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AX88872P 数据表(PDF) 16 Page - ASIX Electronics Corporation

AX88872P 数据表(HTML) 16 Page - ASIX Electronics Corporation

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