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VL6180 数据表(PDF) 10 Page - STMicroelectronics |
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VL6180 数据表(HTML) 10 Page - STMicroelectronics |
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10 / 73 page ![]() Overview VL6180 10/73 DocID024986 Rev 14 1.4 Typical application schematic Figure 3 shows the typical application schematic of the VL6180. Figure 3. VL6180 schematic 1. Open drain. If pin is used, then 47 k recommended, otherwise leave floating 2. Open drain. 47 k recommended 3. Open drain. Pull up resistors typically fitted once per I2C bus at host Note: Capacitors on AVDD and AVDD_VCSEL should be placed as close as possible to the supply pads. 1.5 Recommended solder pad dimensions Figure 4. Recommended solder pattern |
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