ADC3561 datasheet(56/85 Pages) TI

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Figure 8-58. Register 0x0D (PDN GLOBAL MASK)

MASK CLKBUF MASK REFAMP MASK BG DIS

R/W-0

Table 8-18. Register 0x0D Field Descriptions

Bit

Field

Type

Reset

Description

7-4

R/W

Must write 0

MASK CLKBUF

R/W

Global power down mask control for sampling clock input buffer.

0: Clock buffer will get powered down when global power down

is exercised.

1: Clock buffer will NOT get powered down when global power

down is exercised.

MASK REFAMP

R/W

Global power down mask control for reference amplifier.

0: Reference amplifier will get powered down when global power

down is exercised.

1: Reference amplifier will NOT get powered down when global

power down is exercised.

MASK BG DIS

R/W

Global power down mask control for internal 1.2V bandgap

voltage reference. Setting this bit reduces power consumption

in global power down mode but increases the wake up time. See

the power down option overview.

0: Internal 1.2V bandgap voltage reference will NOT get

powered down when global power down is exercised.

1: Internal 1.2V bandgap voltage reference will get powered

down when global power down is exercised.

R/W

Must write 0

ADC3561, ADC3562, ADC3563

SBAS990B – FEBRUARY 2021 – REVISED OCTOBER 2022

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