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P89LPC952FBD 数据表(PDF) 11 Page - NXP Semiconductors |
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P89LPC952FBD 数据表(HTML) 11 Page - NXP Semiconductors |
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11 / 66 page ![]() 9397 750 14716 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Preliminary data sheet Rev. 01— 16 September 2005 11 of 66 Philips Semiconductors P89LPC952 8-bit microcontroller with 10-bit ADC P3.1/XTAL1 11 5 I/O P3.1 — Port 3 bit 1. I XTAL1 — Input to the oscillator circuit and internal clock generator circuits (when selected via the flash configuration). It can be a port pin if internal RC oscillator or watchdog oscillator is used as the CPU clock source, and if XTAL1/XTAL2 are not used to generate the clock for the RTC/system timer. P4.0 to P4.7 I/O Port 4: Port 4 is an 8-bit I/O port with a user-configurable output type. During reset Port 4 latches are configured in the input only mode with the internal pull-up disabled. The operation of Port 4 pins as inputs and outputs depends upon the port configuration selected. Each port pin is configured independently. Refer to Section 7.13.1 “Port configurations” and Table 10 “Static characteristics” for details. All pins have Schmitt triggered inputs. Port 4 also provides various special functions as described below: P4.0 30 24 I/O P4.0 — Port 4 bit 0. P4.1/TRIG 29 23 I/O P4.1 — Port 4 bit 1. O TRIG — JTAG trigger output. P4.2/TXD1 28 22 I/O P4.2 — Port 4 bit 2. O TXD1 — Transmitter output for serial port 1. P4.3/RXD1 27 21 I/O P4.3 — Port 4 bit 3. I RXD1 — Receiver input for serial port 1. P4.4 26 20 I/O P4.4 — Port 4 bit 4. P4.5/SDAT 25 19 I/O P4.5 — Port 4 bit 5. I/O SDAT — Serial data input/output for JTAG interface. P4.6 24 18 I/O P4.6 — Port 4 bit 6. P4.7/SCLK 23 17 I/O P4.7 — Port 4 bit 7. I SCLK — Serial clock input for JTAG interface. P5.0 to P5.7 I/O Port 5: Port 5 is an 8-bit I/O port with a user-configurable output type. During reset Port 5 latches are configured in the input only mode with the internal pull-up disabled. The operation of Port 5 pins as inputs and outputs depends upon the port configuration selected. Each port pin is configured independently. Refer to Section 7.13.1 “Port configurations” and Table 10 “Static characteristics” for details. All pins have Schmitt triggered inputs. Port 5 also provides various special functions as described below: P5.0 21 15 I/O P5.0 — Port 5 bit 0. P5.1 20 14 I/O P5.1 — Port 5 bit 1. P5.2 19 13 I/O P5.2 — Port 5 bit 2. P5.3 18 12 I/O P5.3 — Port 5 bit 3. P5.4 17 11 I/O P5.4 — Port 5 bit 4. P5.5 16 10 I/O P5.5 — Port 5 bit 5. P5.6 15 9 I/O P5.6 — Port 5 bit 6. P5.7 14 8 I/O P5.7 — Port 5 bit 7. VSS 22 16 I Ground: 0 V reference. Table 3: Pin description …continued Symbol Pin Type Description PLCC44 LQFP44 |
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