P89LPC952FBD datasheet(29/66 Pages) PHILIPS

29 / 66 page

9397 750 14716

Preliminary data sheet

Rev. 01— 16 September 2005

29 of 66

Philips Semiconductors

P89LPC952

8-bit microcontroller with 10-bit ADC

7.14.1 Brownout detection

The brownout detect function determines if the power supply voltage drops below a

certain level. The default operation is for a brownout detection to cause a processor reset,

however it may alternatively be conﬁgured to generate an interrupt.

Brownout detection may be enabled or disabled in software.

If brownout detection is enabled the brownout condition occurs when VDD falls below the

brownout trip voltage, Vbo (see Table 10 “Static characteristics”), and is negated when VDD

rises above Vbo. If the P89LPC952 device is to operate with a power supply that can be

below 2.7 V, BOE should be left in the unprogrammed state so that the device can operate

at 2.4 V, otherwise continuous brownout reset may prevent the device from operating.

For correct activation of brownout detect, the VDD rise and fall times must be observed.

Please see Table 10 “Static characteristics” for speciﬁcations.

7.14.2 Power-on detection

The Power-on detect has a function similar to the brownout detect, but is designed to work

as power comes up initially, before the power supply voltage reaches a level where

brownout detect can work. The POF ﬂag in the RSTSRC register is set to indicate an

initial power-up condition. The POF ﬂag will remain set until cleared by software.

7.15 Power reduction modes

The P89LPC952 supports three different power reduction modes. These modes are Idle

mode, Power-down mode, and total Power-down mode.

7.15.1 Idle mode

Idle mode leaves peripherals running in order to allow them to activate the processor

when an interrupt is generated. Any enabled interrupt source or reset may terminate Idle

mode.

7.15.2 Power-down mode

The Power-down mode stops the oscillator in order to minimize power consumption. The

P89LPC952 exits Power-down mode via any reset, or certain interrupts. In Power-down

mode, the power supply voltage may be reduced to the data retention voltage VDDR. This

retains the RAM contents at the point where Power-down mode was entered. SFR

contents are not guaranteed after VDD has been lowered to VDDR, therefore it is highly

recommended to wake-up the processor via reset in this case. VDD must be raised to

within the operating range before the Power-down mode is exited.

Some chip functions continue to operate and draw power during Power-down mode,

increasing the total power used during power-down. These include: Brownout detect,

watchdog timer, comparators (note that comparators can be powered down separately),

and RTC/system timer. The internal RC oscillator is disabled unless both the RC oscillator

has been selected as the system clock and the RTC is enabled.

7.15.3 Total Power-down mode

This is the same as Power-down mode except that the brownout detection circuitry and

the voltage comparators are also disabled to conserve additional power. The internal RC

oscillator is disabled unless both the RC oscillator has been selected as the system clock

P89LPC952FBD 数据表(PDF) 29 Page - NXP Semiconductors

P89LPC952FBD 数据表(HTML) 29 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66

数据表下载