P89LPC952FBD datasheet(32/66 Pages) PHILIPS

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Preliminary data sheet

Rev. 01— 16 September 2005

32 of 66

Philips Semiconductors

P89LPC952

8-bit microcontroller with 10-bit ADC

7.19 UARTs

The P89LPC952 has two enhanced UARTs that are compatible with the conventional

80C51 UART except that Timer 2 overﬂow cannot be used as a baud rate source. The

P89LPC952 does include an independent Baud Rate Generator for each UART (BRG0 for

UART 0 and BRG1 for UART 1). The baud rate can be selected from the oscillator

(divided by a constant), Timer 1 overﬂow, or the independent Baud Rate Generator

associated with the speciﬁc UART. In addition to the baud rate generation, enhancements

over the standard 80C51 UART include Framing Error detection, automatic address

recognition, selectable double buffering and several interrupt options. The UARTs can be

operated in 4 modes: shift register, 8-bit UART, 9-bit UART, and CPU clock/32 or CPU

clock/16.

7.19.1 Mode 0

Serial data enters and exits through RXD_n. TXD_n outputs the shift clock. 8 bits are

transmitted or received, LSB ﬁrst. The baud rate is ﬁxed at 1

⁄

16 of the CPU clock

frequency.

7.19.2 Mode 1

10 bits are transmitted (through TXD_n) or received (through RXD_n): a start bit (logic 0),

8 data bits (LSB ﬁrst), and a stop bit (logic 1). When data is received, the stop bit is stored

in RB8_n in Special Function Register SnCON. The baud rate is variable and is

determined by the Timer 1 overﬂow rate or the Baud Rate Generator (described in Section

7.19.5 “Baud rate generator and selection”).

7.19.3 Mode 2

11 bits are transmitted (through TXD_n) or received (through RXD_n): start bit (logic 0),

8 data bits (LSB ﬁrst), a programmable 9th data bit, and a stop bit (logic 1). When data is

transmitted, the 9th data bit (TB8_n in SnCON) can be assigned the value of ‘0’ or ‘1’. Or,

for example, the parity bit (P, in the PSW) could be moved into TB8_n. When data is

received, the 9th data bit goes into RB8_n in Special Function Register SnCON, while the

stop bit is not saved. The baud rate is programmable to either 1

⁄

16 or

⁄

32 of the CPU clock

frequency, as determined by the SMOD1 bit in PCON. The SMOD1 bit controls the Timer

1 output rate available to both UARTS.

7.19.4 Mode 3

11 bits are transmitted (through TXD_n) or received (through RXD_n): a start bit (logic 0),

8 data bits (LSB ﬁrst), a programmable 9th data bit, and a stop bit (logic 1). In fact, Mode 3

is the same as Mode 2 in all respects except baud rate. The baud rate in Mode 3 is

variable and is determined by the Timer 1 overﬂow rate or the Baud Rate Generator

(described in Section 7.19.5 “Baud rate generator and selection”).

7.19.5 Baud rate generator and selection

Each enhanced UART has an independent Baud Rate Generator. The baud rate is

determined by a baud-rate preprogrammed into the BRGR1_n and BRGR0_n SFRs

which together form a 16-bit baud rate divisor value that works in a similar manner as

Timer 1 but is much more accurate. If the baud rate generator is used, Timer 1 can be

used for other timing functions.

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