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SST26VF032BEUI 数据表(PDF) 71 Page - Microchip Technology

部件名 SST26VF032BEUI
功能描述  32 Mbit Serial Quad I/O (SQI) Flash Memory with EUI-48™ and EUI-64™ Identifier
PDF  76 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

SST26VF032BEUI 数据表(HTML) 71 Page - Microchip Technology

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 2019 Microchip Technology Inc.
DS20006152A-page 71
SST26VF032BEUI
m will have a constant value for specific densities and
is defined as:
• 8Mbit = 4
• 16Mbit = 5
• 32Mbit = 6
• 64Mbit = 7
• 128Mbit = 8
Block Protect Register Start/End Bits are mapped in the
SFDP by using the formula (2m + 1) + (c). “m” is a con-
stant value that represents the different densities from
8Mbit to 128Mbit (used also in the formula calculating
number of 64Kbyte Blocks above). The values that are
going to be placed in the Block Protection Bit Start/End
field table are the constant value adder (c) in the for-
mula and are represented in two’s compliment except
when the value is 00H. If the value is 00H, this location
is the 0 bit location. If the value is other than 0, then this
is a constant value adder (c) that will be used in the for-
mula. The most significant (left most) bit indicates the
sign of the integer; it is sometimes called the sign bit.
If the sign bit is zero, then the number is greater than or
equal to zero, or positive. If the sign bit is one, then the
number is less than zero, or negative.
See Table 11-4 for an example of this formula.
TABLE 11-4:
BPSL/BPEL EQUATION WITH ACTUAL CONSTANT ADDER DERIVED FROM THE
FORMULA (2M + 1) + (C)
Block Size
8 Mbit to 128 Mbit
Comments
8 KByte (Type 2) Bottom
BPSL = (2m + 1) + 0FFH
BPEL = (2m + 1) + 04H
0FFH = -1; 06H = 6
Odd address bits are Read-Lock bit
locations and even address bits are
Write-Lock bit locations.
32 KByte (Type 3)
BPSL = BPEL= (2m + 1) + 0FDH
0FDH= -3
64 KByte (Type 4)
BPSL = 00H
BPEL = (2m + 1) + 0FCH
00H is Block-Protection Register bit 0
location; 0FCH = -4
32 KByte (Type 3)
BPSL = BPEL= (2m + 1) + 0FEH
0FEH=-2
8 KByte (Type 2) Top
BPSL = (2m + 1) + 07H
BPEL = (2m + 1) + 0EH
07H = 7; 0EH = 14
Odd address bits are Read-Lock bit
locations and even address bits are
Write-Lock bit locations.



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