 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
TDA4VL...ALZQ1 数据表(PDF) 85 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
TDA4VL...ALZQ1 数据表(HTML) 85 Page - Texas Instruments |
|
|
85 / 251 page  Table 6-100. DSS0 Signal Descriptions (continued) SIGNAL NAME PIN TYPE DESCRIPTION ALZ PIN VOUT0_DATA15 O Video Output Data 15 AB28 VOUT0_DATA16 O Video Output Data 16 AD28 VOUT0_DATA17 O Video Output Data 17 T26 VOUT0_DATA18 O Video Output Data 18 R28, V23 VOUT0_DATA19 O Video Output Data 19 AB24, R27 VOUT0_DATA20 O Video Output Data 20 Y27, Y28 VOUT0_DATA21 O Video Output Data 21 AA23, W27 VOUT0_DATA22 O Video Output Data 22 T26, Y24 VOUT0_DATA23 O Video Output Data 23 AB26, W23 VOUT0_VP0_DE O Alternative Output Data Enable AA28 VOUT0_VP0_HSYNC O Alternative Output Horizontal Sync U26 VOUT0_VP0_VSYNC O Alternative Output Vertical Sync AD27 VOUT0_VP2_DE O Alternative Output Data Enable AA28 VOUT0_VP2_HSYNC O Alternative Output Horizontal Sync U26 VOUT0_VP2_VSYNC O Alternative Output Vertical Sync AD27 6.3.25 GPMC 6.3.25.1 MAIN Domain Table 6-101. GPMC0 Signal Descriptions SIGNAL NAME PIN TYPE DESCRIPTION ALZ PIN GPMC0_ADVn_ALE O GPMC Address Valid (active low) or Address Latch Enable AB27 GPMC0_CLK IO GPMC clock W25 GPMC0_CLKOUT O GPMC clock generated for external synchronization AD27 GPMC0_DIR O GPMC Data Bus Signal Direction Control R28, Y25 GPMC0_OEn_REn O GPMC Output Enable (active low) or Read Enable (active low) U26 GPMC0_WEn O GPMC Write Enable (active low) AD24 GPMC0_WPn O GPMC Flash Write Protect (active low) AB27 GPMC0_A0 OZ GPMC Address 0 Output. Only used to effectively address 8-bit data non-multiplexed memories T25 GPMC0_A1 OZ GPMC Address 1 Output in A/D non-multiplexed mode and Address 17 in A/D multiplexed mode W24 GPMC0_A2 OZ GPMC Address 2 Output in A/D non-multiplexed mode and Address 18 in A/D multiplexed mode AA25 GPMC0_A3 OZ GPMC Address 3 Output in A/D non-multiplexed mode and Address 19 in A/D multiplexed mode V25 GPMC0_A4 OZ GPMC Address 4 Output in A/D non-multiplexed mode and Address 20 in A/D multiplexed mode T24 GPMC0_A5 OZ GPMC Address 5 Output in A/D non-multiplexed mode and Address 21 in A/D multiplexed mode AB25 GPMC0_A6 OZ GPMC Address 6 Output in A/D non-multiplexed mode and Address 22 in A/D multiplexed mode T23 GPMC0_A7 OZ GPMC Address 7 Output in A/D non-multiplexed mode and Address 23 in A/D multiplexed mode U24 GPMC0_A8 OZ GPMC Address 8 Output in A/D non-multiplexed mode and Address 24 in A/D multiplexed mode AC25 GPMC0_A9 OZ GPMC Address 9 Output in A/D non-multiplexed mode and Address 25 in A/D multiplexed mode AD26 www.ti.com TDA4VE-Q1, TDA4AL-Q1, TDA4VL-Q1 SPRSP62 – DECEMBER 2022 Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 85 Product Folder Links: TDA4VE-Q1 TDA4AL-Q1 TDA4VL-Q1 |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
