TDA4VL...ALZQ1 datasheet(142/251 Pages) TI

142 / 251 page

7.10.4.1.1.2 Shunt Capacitance

The crystal circuit must also be designed such that it does not exceed the maximum shunt capacitance for

WKUP_OSC0 operating conditions defined in Table 7-21. Shunt capacitance, Cshunt, of the crystal circuit is a

combination of crystal shunt capacitance and parasitic contributions. PCB signal traces which connect crystal

circuit components to WKUP_OSC0 have mutual parasitic capacitance to each other, CPCBXIXO, where the

PCB designer should be able to extract mutual parasitic capacitance between these signal traces. The device

package also has mutual parasitic capacitance, CXIXO, where this mutual parasitic capacitance value is defined

in Table 7-22.

PCB routing should be designed to minimize mutual capacitance between XI and XO signal traces. This is

typically done by keeping signal traces short and not routing them in close proximity. Mutual capacitance can

also be minimized by placing a ground trace between these signals when the layout requires them to be routed

in close proximity. It is important to minimize the mutual capacitance on the PCB to provide as much margin as

possible when selecting a crystal.

J7ES_WKUP_OSC_SC_06

Device

WKUP_OSC0_XO

WKUP_OSC0_XI

PCBXIXO

PCB

Signal Traces

Crystal Circuit

Components

XIXO

Figure 7-26. Shunt Capacitance

A crystal should be chosen such that the below equation is satisfied. CO in the equation is the maximum shunt

capacitance specified by the crystal manufacturer.

Cshunt ≥ CO + CPCBXIXO + CXIXO

For example, the equation would be satisfied when the crystal being used is 25 MHz with an ESR = 30 Ω,

CPCBXIXO = 0.04 pF, CXIXO = 0.01 pF, and shunt capacitance of the crystal is less than or equal to 6.95 pF.

7.10.4.1.2 WKUP_OSC0 LVCMOS Digital Clock Source

Figure 7-27 shows the recommended oscillator connections when WKUP_OSC0_XI is connected to a 1.8-V

LVCMOS square-wave digital clock source.

Note

A DC steady-state condition is not allowed on WKUP_OSC0_XI when the oscillator is powered up.

This is not allowed because WKUP_OSC0_XI is internally AC coupled to a comparator that may enter

a unknown state when DC is applied to the input. Therefore, application software should power down

WKUP_OSC0 any time WKUP_OSC0_XI is not toggling between logic states.

TDA4VE-Q1, TDA4AL-Q1, TDA4VL-Q1

SPRSP62 – DECEMBER 2022

www.ti.com

142

Submit Document Feedback

Product Folder Links: TDA4VE-Q1 TDA4AL-Q1 TDA4VL-Q1

TDA4VL...ALZQ1 数据表(PDF) 142 Page - Texas Instruments

TDA4VL...ALZQ1 数据表(HTML) 142 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载