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KSZ9563R 数据表(PDF) 25 Page - Microchip Technology

部件名 KSZ9563R
功能描述  3-Port Gigabit Ethernet Switch with RGMII/MII/RMII Interface and IEEE 1588v2
PDF  226 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

KSZ9563R 数据表(HTML) 25 Page - Microchip Technology

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 2017-2018 Microchip Technology Inc.
DS00002419D-page 25
KSZ9563R
4.3
Media Access Controller (MAC)
4.3.1
MAC OPERATION
The device strictly abides by IEEE 802.3 standards to maximize compatibility. Additionally, there is an added MAC fil-
tering function to filter unicast packets. The MAC filtering function is useful in applications, such as VoIP, where restrict-
ing certain packets reduces congestion and thus improves performance.
The transmit MAC takes data from the egress buffer and creates full Ethernet frames by adding the preamble and the
start-of-frame delimiter ahead of the data, and generates the FCS that is appended to the end of the frame. It also sends
flow control packets as needed.
The receive MAC accepts data via the integrated PHY or via the MII/RMII/RGMII interface. It decodes the data bytes,
strips off the preamble and SFD of each frame. The destination and source addresses and VLAN tag are extracted for
use in filtering and address/ID lookup, and the MAC also calculates the CRC of the received frame, which is compared
to the FCS field. The MAC can discard frames that are the wrong size, that have an FCS error, or when the source MAC
address matches the Switch MAC address.
The receive MAC also implements the Wake on LAN (WoL) feature. This system power saving feature is described in
detail in the Section 4.8, "Power Management".
MIB statistics are collected in both receive and transmit directions.
4.3.2
INTER-PACKET GAP (IPG)
If a frame is successfully transmitted, then the minimum 96-bit time for IPG is specified as being between two consec-
utive packets. If the current packet is experiencing collisions, the minimum 96-bit time for IPG is specified as being from
carrier sense (CRS) to the next transmit packet.
4.3.3
BACK-OFF ALGORITHM
The device implements the IEEE standard 802.3 binary exponential back-off algorithm in half-duplex mode. After 16
consecutive collisions, the packet is dropped.
4.3.4
LATE COLLISION
If a transmit packet experiences collisions after 512 bit times of the transmission, the packet is dropped.
4.3.5
LEGAL PACKET SIZE
On all ports, the device discards received packets smaller than 64 bytes (excluding VLAN tag, including FCS) or larger
than the maximum size. The default maximum size is the IEEE standard of 1518 bytes (1522 bytes if tagged), but the
device can be configured to accept jumbo packets up to 9000 bytes. Jumbo packet traffic on multiple ports can stress
resources and cause activation of flow control.
4.3.6
FLOW CONTROL
The device supports standard MAC Control PAUSE (802.3x flow control) frames in both the transmit and receive direc-
tions for full-duplex connections.
In the receive direction, if a PAUSE control frame is received on any port, the device will not transmit the next normal
frame on that port until the timer, specified in the PAUSE control frame, expires. If another PAUSE frame is received
before the current timer expires, the timer will then update with the new value in the second PAUSE frame. During this
period (while it is flow controlled), only flow control packets from the device are transmitted.
In the transmit direction, the device has intelligent and efficient ways to determine when to invoke flow control and send
PAUSE frames. The flow control is based on availability of the system resources, including available buffers and avail-
able transmit queues.
The device issues a PAUSE frame containing the maximum pause time defined in IEEE standard 802.3x. Once the
resource is freed up, the device sends out another flow control frame with zero pause time to turn off the flow control
(turn on transmission to the port). A hysteresis feature is provided to prevent the flow control mechanism from being
constantly activated and deactivated.



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