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KSZ9563R 数据表(PDF) 53 Page - Microchip Technology

部件名 KSZ9563R
功能描述  3-Port Gigabit Ethernet Switch with RGMII/MII/RMII Interface and IEEE 1588v2
PDF  226 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

KSZ9563R 数据表(HTML) 53 Page - Microchip Technology

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 2017-2018 Microchip Technology Inc.
DS00002419D-page 53
KSZ9563R
4.9.2
I2C SERIAL BUS
The serial management interface may be configured to be an I2C slave. In this mode, an I2C master has complete pro-
gramming access to the device's internal control and status registers, including all MIB counters, address lookup tables,
VLAN table and ACL table.
The 7-bit device address is fixed as 1011_111. Because of the fixed address, only one KSZ9563R may be on the I2C
bus at a time. The R/W control bit is then appended as the least significant bit to form these 8-bit address/control words:
1011_1110 <write>
1011_1111 <read>
The internal registers and tables of the device are accessed using 16-bit addressing and 8-bit data. The access formats
are as follows:
FIGURE 4-11:
SPI REGISTER READ OPERATION
FIGURE 4-12:
SPI REGISTER WRITE OPERATION
FIGURE 4-13:
SINGLE BYTE REGISTER WRITE
FIGURE 4-14:
SINGLE BYTE REGISTER READ
SCS_N
SCL
SDI
(MOSI)
SDO
(MISO)
Read
Command
Read Address
TurnAround
D0
D1
D2
D3
D4
D5
D6
D7
TA
TA
TA
TA
TA
A1 A0
A2
A3
A4
A5
A6
A7
A9
A10
A11
A8
A12
A13
A14
A15
A17 A16
A18
01
1
A20 A19
A22 A21
A23
12
3456789
10
11
12 13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Read Data
SCS_N
SCL
SDI
(MOSI)
SDO
(MISO)
Write
Command
Write Address
Write Data
TurnAround
12
3456789
10
11
12 13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
D0
D1
D2
D3
D4
D5
D6
D7
TA
TA
TA
TA
TA
A1 A0
A2
A3
A4
A5
A6
A7
A9
A10
A11
A8
A12
A13
A14
A15
A17 A16
A18
00
1
A20 A19
A22 A21
A23



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