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KSZ9563R 数据表(PDF) 37 Page - Microchip Technology

部件名 KSZ9563R
功能描述  3-Port Gigabit Ethernet Switch with RGMII/MII/RMII Interface and IEEE 1588v2
PDF  226 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

KSZ9563R 数据表(HTML) 37 Page - Microchip Technology

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 2017-2018 Microchip Technology Inc.
DS00002419D-page 37
KSZ9563R
4.4.8
MULTIPLE SPANNING TREE SUPPORT
Multiple Spanning Tree Protocol (MSTP) is an extension of RSTP that allows different VLANs to have different spanning
tree configurations. The VLAN Table, Address Lookup Table and Static Address Table all contain a 3-bit field which can
be used to specify one of eight spanning trees. Each port contains state registers for specifying unique states for each
of the spanning trees.
4.4.9
TAIL TAGGING MODE
Tail tagging is a method to communicate ingress and egress port information between the host processor and the switch.
It us useful for spanning tree protocol, IGMP/MLD snooping, IEEE 1588, and other applications. As shown in Figure 4-
5, the tail tag is inserted at the end of the packet, between the payload and the 4-byte CRC / FCS.
When the switch forwards a received packet to the host port, one tail tagging byte is added to the packet by the switch
to indicate to the host processor which port the packet was received on. The format is shown in Table 4-13.
In the opposite direction, the host processor must add one tail tag byte to each packet that it sends to the switch to indi-
cate the intended egress ports. When multiple priority queues are enabled, the tail tag is also used to indicate the priority
queue. The format is shown in Table 4-14. This tail tag is removed by the switch before the packet leaves the switch. If
the Lookup bit (bit 6) is set, packet forwarding follows the standard forwarding process, and bits [5:0] are ignored. When
the Lookup bit is not set, bits [4:0] determine the forwarding ports and priority queue, while the Override bit (bit 5) deter-
mines whether port blocking is overridden.
Tail tagging applies only to the host port, never to any other ports of the switch.
FIGURE 4-5:
TAIL TAG FRAME FORMAT
TABLE 4-13:
RECEIVED TAIL TAG FORMAT (FROM SWITCH TO HOST)
Bits
Description
7
PTP Message Indication
0 = Is not a PTP message. A 4-byte receive timestamp has not been added.
1 = Is a PTP message. A 4-byte timestamp has been added before the tail tag.
6:2
RESERVED
1:0
Received Port
00 = Packet received at Port 1
01 = Packet received at Port 2
10 = Packet received at Port 3
11 = RESERVED
TABLE 4-14:
TRANSMIT TAIL TAG FORMAT (FROM HOST TO SWITCH)
Bits
Description
7
RESERVED
6
Lookup
0 = Port forwarding is determined by tail tag bits [5:0] below.
1 = Tail tag bits [5:0] are ignored and port forwarding is determined by the standard
switch forwarding process (address lookup, VLAN, etc.)
5
Port Blocking Override
When set, packets will be sent from the specified port9s0 regardless, and any port
blocking (see Port Transmit Enable in Port MSTP State Register) is ignored.
4:3
Egress priority (0 to 3)
DESTINATION
ADDRESS
SOURCE
ADDRESS
6
6
802.1Q
TAG
(4)
ETYPE or
LENGTH
2
TAIL
TAG
2
PAYLOAD
46 (42) - 1500
FCS
4
BYTES



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