KSZ9567RTXI datasheet(31/232 Pages) MICROCHIP

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KSZ9567R

4.4.2.8

Lookup Engine Registers

Table 4-7 provides a list of lookup engine related registers.

4.4.3

IEEE 802.1Q VLAN

Virtual LAN is a means of segregating a physical network into multiple virtual networks whereby traffic may be confined

to specific subsets of the greater network. IEEE 802.1Q defines a VLAN protocol using a 4-byte tag that is added to the

Ethernet frame header. The device supports port-based and tag-based VLANs, including tagging, un-tagging, forward-

ing and filtering.

4.4.3.1

Non-Tag Port-Based VLAN

The simplest VLAN method establishes forwarding restrictions on a port-by-port basis without using VLAN tags. There

is a register for each ingress port that is used to specify the allowed forwarding ports. An incoming packet is restricted

from being forwarded to any egress port that is disallowed for that ingress port. The settings are made in the Port Control

1 Register. This function is always enabled; it is not enabled and disabled by the 802.1Q VLAN Enable bit in the Switch

Lookup Engine Control 0 Register. The default setting is to allow all ingress-to-egress port paths.

4.4.3.2

Tag-Based VLAN

When 802.1Q VLAN is enabled, an internal VLAN Table with 4k entries is used to a store port membership list, VLAN

group ID (FID) and additional information relating to each VLAN. This table must be set up by an administrator prior to

enabling 802.1Q VLAN. Enabling is done by setting the 802.1Q VLAN Enable bit in the Switch Lookup Engine Control

0 Register.

In 802.1Q VLAN mode, the lookup process starts with VLAN Table lookup, using the tag's VID as the address. The first

step is to determine whether the VID is valid. If the VID is not valid, the packet is dropped and its address is not learned.

Alternatively, unknown VID packets may be forwarded to pre-defined ports or to the host port. If the VID is valid, the FID

is retrieved for further lookup. The FID + Destination Address (hashed(DA) + FID) are used to determine the destination

port. The FID + Source Address (hashed(SA) + FID) are used for address learning (see Table 4-9 and Table 4-10).

TABLE 4-7:

LOOKUP ENGINE REGISTERS

Registers

Description

Global Interrupt Status Register,

Global Interrupt Mask Register

Top level LUE interrupt

Switch Lookup Engine Control 0 Register,

Switch Lookup Engine Control 1 Register,

Switch Lookup Engine Control 2 Register,

Switch Lookup Engine Control 3 Register

Misc.

Address Lookup Table Interrupt Register,

Address Lookup Table Mask Register

Low level LUE interrupts

Address Lookup Table Entry Index 0 Register,

Address Lookup Table Entry Index 1 Register

Access failure address/index

ALU Table Index 0 Register,

ALU Table Index 1 Register,

ALU Table Access Control Register,

Static Address and Reserved Multicast Table

Control Register,

ALU / Static Address Table Entry 1 Register,

ALU / Static Address / Reserved Multicast

Table Entry 2 Register,

ALU / Static Address Table Entry 3 Register,

ALU / Static Address Table Entry 4 Register

Address table access registers

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