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KSZ9567RTXI 数据表(PDF) 38 Page - Microchip Technology |
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KSZ9567RTXI 数据表(HTML) 38 Page - Microchip Technology |
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38 / 232 page ![]() KSZ9567R DS00002329D-page 38 2017-2019 Microchip Technology Inc. • Software action: The host processor should program the Static Address Table with the entries that it needs to receive (e.g., BPDU packets). The “overriding” bit should be set so that the switch will forward those specific pack- ets to the processor. The processor may send packets to the port(s) in this state (see Section 4.4.9, "Tail Tagging Mode" for details). Address learning is enabled on the port in this state. RSTP uses only one type of BPDU called RSTP BPDUs. They are similar to STP configuration BPDUs with the excep- tion of a type field set to “version 2" for RSTP and “version 0" for STP, and a flag field carrying additional information. 4.4.8 MULTIPLE SPANNING TREE SUPPORT Multiple Spanning Tree Protocol (MSTP) is an extension of RSTP that allows different VLANs to have different spanning tree configurations. The VLAN Table, Address Lookup Table and Static Address Table all contain a 3-bit field which can be used to specify one of eight spanning trees. Each port contains state registers for specifying unique states for each of the spanning trees. 4.4.9 TAIL TAGGING MODE Tail tagging is a method to communicate ingress and egress port information between the host processor and the switch. It is useful for spanning tree protocol, IGMP/MLD snooping, IEEE 1588, and other applications. As shown in Figure 4- 5, the tail tag is inserted at the end of the packet, between the payload and the 4-byte CRC / FCS. When the switch forwards a received packet to the host port, one tail tagging byte is added to the packet by the switch to indicate to the host processor the port that the packet was received on. The format is shown in Table 4-13 . In the opposite direction, the host processor must add two tail tag bytes to each packet that it sends to the switch to indicate the intended egress ports. When multiple priority queues are enabled, the tail tag is also used to indicate the priority queue. The format is shown in Table 4-14 . This tail tag is removed by the switch before the packet leaves the switch. If the Lookup bit (bit 10) is set, packet forwarding follows the standard forwarding process, and bits [9:0] are ignored. When the Lookup bit is not set, bits [8:0] determine the forwarding ports and priority queue, while the Override bit (bit 9) determines whether port blocking is overridden. Tail tagging applies only to the host port, never to any other ports of the switch. FIGURE 4-5: TAIL TAG FRAME FORMAT TABLE 4-13: RECEIVE TAIL TAG FORMAT (FROM SWITCH TO HOST) Bits Description 7 PTP Message Indication 0 = Is not a PTP message. A 4-byte receive timestamp has not been added. 1 = Is a PTP message. A 4-byte timestamp has been added before the tail tag. 6:3 Reserved 2:0 Received Port 000 = Packet received at Port 1 001 = Packet received at Port 2 010 = Packet received at Port 3 011 = Packet received at Port 4 100 = Packet received at Port 5 101 = Packet received at Port 6 110 = Packet received at Port 7 DEST ADDRESS SOURCE ADDRESS 6 6 802.1Q TAG (4) ETYPE or LENGTH 2 TAIL TAG 2 (From Host) 1 (To Host) PAYLOAD 46 (42) - 1500 FCS 4 BYTES |
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