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KSZ9567RTXI 数据表(PDF) 107 Page - Microchip Technology |
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KSZ9567RTXI 数据表(HTML) 107 Page - Microchip Technology |
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107 / 232 page  2017-2019 Microchip Technology Inc. DS00002329D-page 107 KSZ9567R 5.1.5.2 VLAN Table Entry 1 Register 5.1.5.3 VLAN Table Entry 2 Register 5.1.5.4 VLAN Table Index Register Address: 0x0404 - 0x407 Size: 32 bits Bits Description Type Default 31:7 RESERVED R/O 0x0000000 6:0 PORT UNTAG This field in the VLAN Table specifies the untagging policy for each egress port. Bits [6:0] correspond to ports [7:1]. 1 = Untag packets upon egress at this port 0 = Do not untag upon egress at this port R/W 0x00 Note: Refer to Section 5.3.4, "VLAN Table," on page 195 for additional information on VLAN tables. Address: 0x0408 - 0x040B Size: 32 bits Bits Description Type Default 31:7 RESERVED R/O 0x0000000 6:0 PORT FORWARD This field specifies the forwarding policy to each port. The policy is applied if the FO bit is set. Bits [6:0] correspond to ports [7:1]. 1 = Forward to this port 0 = Do not forward to this port R/W 0x00 Note: Refer to Section 5.3.4, "VLAN Table," on page 195 for additional information on VLAN tables. Address: 0x040C - 0x040D Size: 16 bits Bits Description Type Default 15:12 RESERVED RO 0x0 11:0 VLAN Index This value addresses the VLAN table, in combination with the VLAN table action in the following register. R/W 0x000 Note: Refer to Section 5.3.4, "VLAN Table," on page 195 for additional information on VLAN tables. |
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