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STE2001

Figure 15.

Memory Blanking Procedure

This instruction allows to fill the memory with ”blank” patterns, in order to delete patterns randomly generated

in memory when starting up the device. This instruction substitutes (128X9) single ”write” instructions. It is pos-

sible to program ”Memory Blanking Procedure” only under the following conditions:

- X address = 0

- Y address = 0

-V bit

= 0

- PD bit

= 0

- MX bit

= 0

The end of the procedure will be notified on the BSY_FLG pad going HIGH (while LOW the procedure is run-

ning). Any instruction programmed with BSY_FLG LOW will be ignored that is, no instruction can be pro-

grammed for a period equivalent to 128X9 internal write cycles (128X9X1/fclock). The start of Memory blanking

procedure will be between one and two fclock cycles from the last active edge (E rising edge for the parallel

Checker Board Procedure

This instruction allows to fill the memory with ”checker-board” pattern. It is mainly intended to developers, who

can now simply obtain complex module test configuration by means of a single instruction. It is possible to pro-

gram ”Checker Board Procedure” only under the following conditions:

- X address = 0

- Y address = 0

-V bit

= 0

- PD bit

= 0

- MX bit

= 0

A0

B

PRS=0

D01IN1257

PRS=1

01h

00h

03h

05h

02h

04h

7Dh 7Eh 7Fh 00h 01h 02h 03h 04h 05h

7Ch

7Dh 7Eh 7Fh

7Ch