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STE2004 数据表(PDF) 59 Page - STMicroelectronics

部件名 STE2004
功能描述  102 X 65 SINGLE CHIP LCD CONTROLLER / DRIVER
PDF  66 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STE2004 数据表(HTML) 59 Page - STMicroelectronics

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STE2004
Figure 73. 68000-series Parallel interface timing
Figure 74. 8080-series parallel Interface timing
Table 23 Electrical Characteristics (continued)
AC OPERATION (continued)
(VDD1 = 1.7 to 3.6 V; VDD2 = 1.75 to 4.5V; Vss1,2 = 0V; VLCD = 4.5 to 15 V; Tamb =-40 to 85°C; unless otherwise specified)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
PARALLEL INTERFACE
TCYC
System Cycle Time
VDD1 = 1.7V; Read & Write
125
ns
TCLW
Control Low Pulse Width (WR)
20
ns
TCHW
Control High Pulse Width (WR)
75
ns
TCLR
Control Low Pulse Width (RD)
40
ns
TCHR
Control High Pulse Width (RD)
55
ns
TEWHW
Enable High Pulse Width (Write)
60
ns
TEWLW
Enable Low Pulse Width (Write)
60
ns
TEWHR
Enable High Pulse Width (Read)
60
ns
TEWLR
Enable Low Pulse Width (Read)
60
ns
TSU(A)
Address Set-up Time
10
ns
TH(A)
Address Hold Time
10
ns
TSU1
Data Set-Up Time
30
ns
TH1
Data Hold Time
30
ns
TSU2
Read Access Time
40
ns
TH2
Output Disable Time
0
30
ns
D/C
R/W
CS
E
D0 to D7
(Write)
D0 to D7
(Read)
tSU2
tH2
tSU1
tCYC
tH(A)
tSU(A)
tEWHR, tEWHW
tEWLR, tEWLW
tH1
D/C
CS
WR, RD
D0 to D7
(Write)
D0 to D7
(Read)
tSU2
tH2
tSU1
tCYC
tH (A)
tSU(A)
tCLR , tCLW
tCHR , tCHW
tH1



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