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STM32U535NET6QTR 数据表(PDF) 25 Page - STMicroelectronics

部件名 STM32U535NET6QTR
功能描述  Ultra-low-power Arm® Cortex®-M33 MCUTrustZone®FPU,240 DMIPS, up to 512 KB flash memory, 274 KB SRAM
PDF  278 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM32U535NET6QTR 数据表(HTML) 25 Page - STMicroelectronics

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DS14217 Rev 1
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STM32U535xx
Functional overview
84
3.4.2
Additional flash memory protections when TrustZone activated
When the TrustZone security is enabled through option bytes, the whole flash memory is
secure after reset and the following protections are available:
non-volatile watermark-based secure flash memory area
The secure area can be accessed only in Secure mode. One area per bank can be
selected with a page granularity.
secure HDP (hide protection area)
It is part of the flash memory secure area and can be protected to deny an access to
this area by any data read, write and instruction fetch. For example, a software code in
the secure flash memory hide protection area can be executed only once and deny any
further access to this area until next system reset. One area per bank can be selected
at the beginning of the secure area.
volatile block-based secure flash memory area
Each page can be programmed on-the-fly as secure or nonsecure.
3.4.3
FLASH privilege protection
Each flash memory page can be programmed on-the-fly as privileged or unprivileged.
Backup registers
0.5
Yes
Yes
N/A
Yes(2)
Yes(2)
N/A(8)
1
Yes
Yes
N/A
No
No
N/A(8)
2
Yes
Yes
N/A
N/A
N/A
N/A
SRAM2/backup
RAM
0.5
Yes
Yes
N/A
Yes(2)
Yes(2)
N/A(9)
1
Yes
Yes
N/A
No
No
N/A(9)
2
Yes
Yes
N/A
N/A
N/A
N/A
1. When the protection level 2 is active, the debug port and the bootloader mode are disabled.
2. Depends on TrustZone security access rights.
3. The system memory is only read-accessible, whatever the protection level (0, 1 or 2) and execution mode.
4. Option bytes are only accessible through the flash memory registers and OPSTRT bit.
5. The flash main memory is erased when the RDP option byte regresses from level 1 to level 0.
6. SWAP_BANK option bit can be modified.
7. OTP can only be written once.
8. The backup registers are erased when RDP changes from level 1 to level 0.
9. All SRAMs are erased when RDP changes from level 1 to level 0.
Table 4. Access status versus protection level and execution modes when TZEN = 1 (continued)
Area
RDP
level
User execution
(boot from flash memory)
Debug/ bootloader(1)
Read
Write
Erase
Read
Write
Erase



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