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STM32G0C1NET7 数据表(PDF) 36 Page - STMicroelectronics |
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STM32G0C1NET7 数据表(HTML) 36 Page - STMicroelectronics |
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36 / 159 page  Functional overview STM32G0C1xC/xE 36/159 DS13564 Rev 4 3.27 USB Type-C™ Power Delivery controller The device embeds two controllers (UCPD1 and UCPD2) compliant with USB Type-C Rev. 1.2 and USB Power Delivery Rev. 3.0 specifications. The controllers use specific I/Os supporting the USB Type-C and USB Power Delivery requirements, featuring: • USB Type-C pull-up (Rp, all values) and pull-down (Rd) resistors • “Dead battery” support • USB Power Delivery message transmission and reception • FRS (fast role swap) support The digital controller handles notably: • USB Type-C level detection with de-bounce, generating interrupts • FRS detection, generating an interrupt • byte-level interface for USB Power Delivery payload, generating interrupts (DMA compatible) • USB Power Delivery timing dividers (including a clock pre-scaler) • CRC generation/checking • 4b5b encode/decode • ordered sets (with a programmable ordered set mask at receive) • frequency recovery in receiver during preamble The interface offers low-power operation compatible with Stop mode, maintaining the capacity to detect incoming USB Power Delivery messages and FRS signaling. 3.28 Controller area network (FDCAN) The controller area network (CAN) subsystem consists of two CAN modules and a message RAM. The CAN modules are compliant with ISO 11898-1 (CAN protocol specification version 2.0 part A, B) and CAN FD protocol specification version 1.0. The 1-Kbyte message RAM per CAN module implements filters, receive FIFOs, receive buffers, transmit event FIFOs, and transmit buffers. 3.29 Development support 3.29.1 Serial wire debug port (SW-DP) An Arm SW-DP interface is provided to allow a serial wire debugging tool to be connected to the MCU. |
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