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STM32G0C1NET3 数据表(PDF) 102 Page - STMicroelectronics

部件名 STM32G0C1NET3
功能描述  Arm® Cortex®-M0 32-bit MCU, up to 512KB Flash, 144KB RAM,6x USART, timers, ADC, DAC, comm. I/Fs, AES, RNG, 1.7-3.6V
PDF  159 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM32G0C1NET3 数据表(HTML) 102 Page - STMicroelectronics

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Electrical characteristics
STM32G0C1xC/xE
102/159
DS13564 Rev 4
fADC
ADC clock frequency
Range 1
0.14
-
35
MHz
Range 2
0.14
-
16
fs
Sampling rate
12 bits
-
-
2.50
MSps
10 bits
-
-
2.92
8 bits
-
-
3.50
6 bits
-
-
4.38
fTRIG
External trigger
frequency
fADC = 35 MHz; 12 bits
-
-
2.33
MHz
12 bits
-
-
fADC/15
VAIN (3)
Conversion voltage
range
-VSSA
-VREF+
V
RAIN
External input
impedance
--
-
50
kΩ
CADC
Internal sample and
hold capacitor
--
5
-
pF
tSTAB
ADC power-up time
-
2
Conversion
cycle
tCAL
Calibration time
fADC = 35 MHz
2.35
µs
-82
1/fADC
tLATR
Trigger conversion
latency
CKMODE = 00
2
-
3
1/fADC
CKMODE = 01
6.5
1/fPCLK
CKMODE = 10
12.5
CKMODE = 11
3.5
ts
Sampling time
fADC = 35 MHz;
VDDA > 2V
0.043
-
4.59
µs
1.5
-
160.5
1/fADC
fADC = 35 MHz;
VDDA < 2V
0.1
-
4.59
µs
3.5
160.5
1/fADC
tADCVREG_STUP
ADC voltage regulator
start-up time
--
-
20
µs
tCONV
Total conversion time
(including sampling
time)
fADC = 35 MHz
Resolution = 12 bits
0.40
-
4.95
µs
Resolution = 12 bits
ts + 12.5 cycles for successive
approximation
= 14 to 173
1/fADC
tIDLE
Laps of time allowed
between two
conversions without
rearm
-
-
-
100
µs
Table 61. ADC characteristics(1) (continued)
Symbol
Parameter
Conditions(2)
Min
Typ
Max
Unit



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