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STM32G0C1NET3 数据表(PDF) 103 Page - STMicroelectronics |
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STM32G0C1NET3 数据表(HTML) 103 Page - STMicroelectronics |
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103 / 159 page ![]() DS13564 Rev 4 103/159 STM32G0C1xC/xE Electrical characteristics 124 IDDA(ADC) ADC consumption from VDDA fs = 2.5 MSps - 410 - µA fs = 1 MSps - 164 - fs = 10 kSps - 17 - IDDV(ADC) ADC consumption from VREF+ fs = 2.5 MSps - 65 - µA fs = 1 MSps - 26 - fs = 10 kSps - 0.26 - 1. Guaranteed by design 2. I/O analog switch voltage booster must be enabled (BOOSTEN = 1 in the SYSCFG_CFGR1) when VDDA < 2.4 V and disabled when VDDA ≥ 2.4 V. 3. VREF+ is internally connected to VDDA on some packages.Refer to Section 4: Pinouts, pin description and alternate functions for further details. Table 61. ADC characteristics(1) (continued) Symbol Parameter Conditions(2) Min Typ Max Unit Table 62. Maximum ADC RAIN . Resolution Sampling cycle at 35 MHz Sampling time at 35 MHz [ns] Max. RAIN(1)(2) (Ω) 12 bits 1.5(3) 43 50 3.5 100 680 7.5 214 2200 12.5 357 4700 19.5 557 8200 39.5 1129 15000 79.5 2271 33000 160.5 4586 50000 10 bits 1.5(3) 43 68 3.5 100 820 7.5 214 3300 12.5 357 5600 19.5 557 10000 39.5 1129 22000 79.5 2271 39000 160.5 4586 50000 |
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