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STM32G0C1NET3 数据表(PDF) 113 Page - STMicroelectronics |
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STM32G0C1NET3 数据表(HTML) 113 Page - STMicroelectronics |
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113 / 159 page  DS13564 Rev 4 113/159 STM32G0C1xC/xE Electrical characteristics 124 5.3.20 Comparator characteristics TCoeff_vrefbuf Temperature coefficient of VREFBUF(3) -40 °C < TJ < +125 °C - - 50 ppm/ °C PSRR Power supply rejection DC 40 60 - dB 100 kHz 25 40 - tSTART Start-up time CL = 0.5 µF(4) -300 350 µs CL = 1.1 µF(4) -500 650 CL = 1.5 µF(4) -650 800 IINRUSH Control of maximum DC current drive on VREFBUF_OUT during start-up phase (5) -- 8 - mA IDDA(VREFB UF) VREFBUF consumption from VDDA Iload = 0 µA - 16 25 µA Iload = 500 µA - 18 30 Iload = 4 mA - 35 50 1. Guaranteed by design. 2. In degraded mode, the voltage reference buffer can not maintain accurately the output voltage which will follow (VDDA - drop voltage). 3. The temperature coefficient at VREF+ output is the sum of TCoeff_vrefint and TCoeff_vrefbuf. 4. The capacitive load must include a 100 nF capacitor in order to cut-off the high frequency noise. 5. To correctly control the VREFBUF inrush current during start-up phase and scaling change, the VDDA voltage should be in the range [2.4 V to 3.6 V] and [2.8 V to 3.6 V] respectively for VRS = 0 and VRS = 1. Table 66. VREFBUF characteristics(1) (continued) Symbol Parameter Conditions Min Typ Max Unit Table 67. COMP characteristics(1) Symbol Parameter Conditions Min Typ Max Unit VDDA Analog supply voltage -1.62 - 3.6 V VIN Comparator input voltage range -0 - VDDA V VBG(2) Scaler input voltage - VREFINT V VSC Scaler offset voltage - - ±5 ±10 mV IDDA(SCALER) Scaler static consumption from VDDA BRG_EN=0 (bridge disable) - 200 300 nA BRG_EN=1 (bridge enable) - 0.8 1 µA tSTART_SCALER Scaler startup time - - 100 200 µs |
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