Please note that CFG2 has the brownout detection disabled. This is intended to be used mainly for debug

purposes because an input voltage lower than 80 V could lead to unpredictable Vout behavior (see PSR operation

section).

Table 10. Suggested RDLY-CCFG programming values

TDLY (ns)

RDLY (kΩ) (1%)

CDLY (nF) (5% - >6.3V rated)

CFG1

CFG2

CFG3

CFG4

CFG5

163.9

30

1.2n

3.9n

12n

33n

82n

183.1

39

1n

2.7n

8.2n

27n

56n

219.3

56

680p

2.2n

6.2n

18n

39n

259.8

75

470p

1.5n

4.7n

12n

33n

355.6

120

270p

1n

2.7n

8.2n

18n

419.5

150

220p

680p

2.2n

6.8n

15n

483.4

180

180p

560p

1.8n

5.6n

12n

568.6

220

150p

470p

1.5n

4.7n

10n

675.1

270

120p

390p

1.2n

3.3n

8.2n

802.9

330

100p

330p

1n

2.7n

6.8n

1101.1

470

82p

220p

680p

2.2n

4.7n

1292.8

560

68p

180p

560p

1.8n

3.9n

The above configurations are intended to be selected in order to fit different application requirements in terms of

input voltage. The typical use of the different configurations is shown in the next table.

Table 11. Suggested configuration vs. application input voltage requirements

CFG

Mains voltage range

Typ. Vin range

Note

CFG1

Universal

90 Vac ÷ 305 Vac

CFG2

Extended

> 80 V ÷ 400 Vac

Only for debug purpose

CFG3

European

180 Vac ÷ 305 Vac

CFG4

Extended

90 Vac ÷ 400 Vac

CFG5

Universal

90 Vac ÷ 305 Vac

6.8

Protections

A comprehensive set of protections is embedded in the HVLED101 in order to facilitate the design of an

application with a very high grade of robustness.

6.8.1

Overcurrent protection (2nd OCP)

In case of transformer saturation or secondary side rectifier short-circuit, the primary side current rises quickly to a

very high value.

To avoid this current becoming dangerous, a second level OCP protection threshold is provided. It stops the

switching activity for a longer duration (TOCP) before recovering the switching activity.

During TOCP, the THD optimizer drives the internal switched resistor always ON (setting δc = 1 in Section 6.3.1 ).

6.8.2

Input overvoltage protection (iOVP)

The level of this protection is programmed selecting the value of the time constant of the RC network placed

between the DLY/CFG pin and GND according to Table 9.

HVLED101

Protections

DS14143 - Rev 2

page 24/36