数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

HVLED101TR 数据表(PDF) 10 Page - STMicroelectronics

部件名 HVLED101TR
功能描述  Advanced high power factor flyback controller with valley locking and maximum power control
PDF  36 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

HVLED101TR 数据表(HTML) 10 Page - STMicroelectronics

Back Button HVLED101TR Datasheet HTML 6Page - STMicroelectronics HVLED101TR Datasheet HTML 7Page - STMicroelectronics HVLED101TR Datasheet HTML 8Page - STMicroelectronics HVLED101TR Datasheet HTML 9Page - STMicroelectronics HVLED101TR Datasheet HTML 10Page - STMicroelectronics HVLED101TR Datasheet HTML 11Page - STMicroelectronics HVLED101TR Datasheet HTML 12Page - STMicroelectronics HVLED101TR Datasheet HTML 13Page - STMicroelectronics HVLED101TR Datasheet HTML 14Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 10 / 36 page
background image
Symbol
Pin/Block
Parameter
Test condition
Min.
Typ.
Max.
Unit
TOPTO-TRIG
OPTO
Minimum pulse
duration to exit
from ramp-up
phase
10.5
µs
Current sense input
VCS-MIN
CS
Current sense
minimum level
during burst-mode
VFB < VBM
25
50
80
mV
VCS-RU
CS
Current sense level
during ramp-up
During fixed frequency ramp-up
phase
170
200
230
mV
TLEB
CS
Leading edge
blanking
230
300
390
ns
VOCP2
CS
Saturation
protection threshold
(2nd OCP)
During on-time [TrackCS]
1.2
1.3
1.4
V
VOCP1
CS
Cycle-by-cycle
current sense limit
(1st OCP)
During on-time [TrackCS]
0.837
0.9
0.963
V
TOCP
CS
Max. stop state
duration after 2nd
OCP
Tpulse = 1 µs, amplitude 2 V
0.72
1.04
1.41
ms
TPD
CS
Propagation to
output of current
sense detection
On time running, dV/dt = 0.141 V/us
80
ns
KFF
CS, ZCD
Current gain
between ZCD
source current and
CS pin source
current
On time running, IZCD = 0 to 3 mA
75
µA/mA
ZCD input
VZCD-TRIG
ZCD
ZCD triggering
threshold
Negative going edge [TRACKZCD]
0.16
0.2
0.26
V
VZCD-ARM
ZCD
ZCD arming
threshold
Positive going edge [TRACKZCD]
0.24
0.3
0.39
V
TBLANK
ZCD
ZCD minimum
blanking time
From MOSFET turn-off,
with PSR S&H > VUVP
0.97
1.5
2.1
µs
From MOSFET turn-off,
with PSR S&H < VUVP
3.3
5.5
7.7
µs
TDLY-MIN
DLY/CFG
ZCD trigger to GD
on min. delay
RDLY = 120 kΩ
355
ns
TDLY-MAX
DLY/CFG
ZCD trigger to GD
on max. delay
RDLY = 270 kΩ
675
ns
TWAIT-MIN
ZCD
ZCD waiting time
after TBLANK elapse
Starting from ZCD trigger, RDLY = 120
kΩ [track TDLY]
2.2
µs
TWAIT-MAX
ZCD
Starting from ZCD trigger, RDLY = 2.7
kΩ [track TDLY]
4.8
µs
VZCD-CLP-low ZCD
ZCD negative
clamping voltage
IZCD source = 3 mA
-250
mV
IZCD-Bias
ZCD
ZCD pin biasing
current
VZCD = 2.7 V
1
µA
VZCD-max
ZCD
ZCD pin max.
positive voltage
IZCD sink = 1mA
3
V
HVLED101
Electrical characteristics
DS14143 - Rev 2
page 10/36



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com