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STWBC2-HP 数据表(PDF) 70 Page - STMicroelectronics |
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STWBC2-HP 数据表(HTML) 70 Page - STMicroelectronics |
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70 / 96 page  Figure 74. Read Modify Write access Example 1: • Register is 8’b00110100 • RMW operation is done on 1 bit, pos[2:0] = 1 and bits[0] = 1. • Then register becomes 8’b00110110 Example 2: • Register is 8’b00110100 • RMW operation is done on 2 bit, pos[2:0] = 2 and bits[1:0] = 2’b10. • Then register becomes 8’b00111000 2.2.13.4 Operating parameters Table 50 summarizes the IP functional operating parameters. Table 50. SPI operating parameters Parameter Value Operating frequency 16 MHz SPI frequency 16 MHz Note: The minimum clock ratio of SPI_CLK vs AFE_CLK is 2. 2.2.14 Register sub-system 2.2.14.1 Overview This block is a multifunction IP which includes the page register bank selection and the data register array selected by the page register contents. Figure 75 shows the page register bank selection block diagram. STWBC2-HP Digital AFE functions DS13825 - Rev 1.0 page 70/96 |
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