STWBC2-HP datasheet(31/96 Pages) STMICROELECTRONICS

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From the selected HW event, the chronometer captures by default the time for which the event is

logic 1 (P polarity) and for which the event is logic 0 (N polarity). These two times are stored in the

PWM_TIME_COARSE_P + PWM_TIME_FINE_P registers for P polarity and PWM_TIME_COARSE_N +

PWM_TIME_FINE_N registers for N polarity. It is possible to force the N polarity to logic 1 as well. To do so,

write 1 to the bit COPY_EVENT of the PWM_CONTROL_2 register.

The time is captured in registers only once. After the capture, the values in the PWM_TIME_x registers are

memorized. To capture a new time, the PWM_TIME_x registers must be cleared. This is done by writing 1 to the

CLEAR_CAPTURE bit of the PWM_CONTROL_1 register. When a new time is captured, the corresponding bits

TIME_N_CAPTURED and TIME_P_CAPTURED in the PWM_STATUS register pass 1.

The time capture is gated by the CAPTURE_P and CAPTURE_N produced by the HR-PWM sequence. The time

is effectively captured only if the HW event polarity is reached and the CAPTURE_x corresponding signal is high.

The CAPTURE_x signals are useful to mask some glitches present in the HW event signal.

The sensitivity on HW event is by default on level. It can be set to rising edge by writing 1 to the

EXT_EVENT_EDGE bit of the PWM_CONTROL_1 register.

Even if the time is captured only once in the PWM_TIME_x registers, the chronometer runs continuously and

provides time information to the phase demodulator.

It is possible to choose which time event is provided to the phase demodulator using the bits DEMOD_ON_N and

DEMOD_ON_P in the PWM_CONTROL_3 registers. If both DEMOD_ON_N and DEMOD_ON_P are set to 1, the

sum of time P and time N is provided to the phase demodulator.

The event mux can select pwm_output[3] as source. Using this, it is possible to qualify the chronometer

exactness by programming precise timing of pwm_output[3] toggling.

•

Oscillator mode:

–

The HR-PWM can run in oscillator mode. In this mode, the HW event interacts directly with the PWM

sequence so that the effective PWM frequency depends on the HW event timing. When this mode is

enabled, the HR-PWM sequencer can exit the current running step since the HW event happens. This

early exit of step is enabled by the EXIT_ON_EVENT bit of the PWM_CONTROL_1 register.

•

During oscillator mode, it is possible to be in a situation where the HW event is valid only for P polarity or N

polarity (this is typically the case on the bridge current of a half-bridge circuit). In this case, it could miss a

valid event to exit the step.

The HR-PWM is capable of faking the missing event by producing one having the same timing as the valid

one. By writing 1 to the bit FAKE_EVENT_N of the PWM_CONTROL_3 register, the HR-PWM generates a

fake N event having the same timing than the valid P event. By writing 1 to the bit FAKE_EVENT_0 of the

PWM_CONTROL_3 register, the HR-PWM generates a fake P event having the same timing as the valid N event.

The time capture functionality requires the next configuration steps:

Be sure that PWM sequence of steps includes the management of CAPTURE_N and CAPTURE_P signals

that gate the HW event (CAPTURE_N & P are exclusives).

Select the HW event source in the EXT_EVENT_SEL field. If edge sensitivity is needed, set the

EXT_EVENT_EDGE bit. If N timing has to be linked to the HW event logic 1, set the COPY_EVENT bit.

For each needed time capture:

Set CLEAR_CAPTURE bit to clear the PWM_TIME_x registers.

Wait for TIME_N_CAPTURED and/or TIME_P_CAPTURED bits passing one.

Read the time captured in PWM_TIME_x registers.

Oscillator mode requires the next configuration steps:

Configure the chronometer function as detailed above.

If needed, fake an invalid event using the FAKE_EVENT_N or FAKE_EVENT_P bits.

Set the bit EXIT_ON_EVENT that indirectly configures the HR-PWM in oscillator mode.

Enable the HR-PWM.

2.2.1.5

Operating parameters

Table 23 summarizes the IP functional target operating parameters.

STWBC2-HP

Digital AFE functions

DS13825 - Rev 1.0

page 31/96

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