HMLQ25201T-R47MSR datasheet(33/52 Pages) RENESAS

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DA9080

High Current, Highly Configurable System

PMIC with Four Bucks and One LDO

Datasheet

Revision 1.2

08-Feb-2022

CFR0011-120-00

33 of 51

12 I2C Communication

DA9080 includes an I2C-compatible 2-wire serial interface to access the internal registers. Through

the I2C interface, the host processor controls each channel and reads back system status. The

DA9080 only operates as a slave device.

The host processor provides the serial clock at the SCL pin. DA9080 supports I2C Standard-mode at

100 kHz, Fast-mode at 400 kHz, and Fast-mode Plus at 1000 kHz.

DA9080 SLAVE address is 0x1B.

The I2C data pin, SDA, is open drain which allows multiple devices to share a communication line.

All transmissions begin with a START condition issued from the Master while the bus is in an IDLE

state (the bus is free). The START condition is initiated by a high to low transition on SDA while SCL

is high. Alternately, a STOP condition is indicated by a low to high transition on SDA while SCL is

high, see Figure 11.

SDA

SCL

Start (S)

is SDA falling

while SCL is high

Data SDA must be

stable during SCL high

Data sampled on

SCL rising edge

Data driven on

SCL falling edge

Stop (P) is SDA rising

while SCL high

Figure 11: I2C Start (S) and Stop (P)

The I2C interface uses a two-byte serial protocol containing one byte for address and one byte for

data. The data and address are transferred with MSB transmitted first for both read and write

operations.

DA9080 monitors the serial bus for a valid SLAVE address when the interface is enabled. When it

receives its own slave address, DA9080 immediately gives an Acknowledge signal to the host by

pulling SDA low during the following clock cycle. A Not Acknowledge signal is given by a logic 1, not

pulling down the SDA line.

A single-byte write is shown in Figure 12. Here the slave address is followed by a write bit (low), the

SLAVEadr

REGadr

DATA

7-bits

1-bit

adr=REGadr

8-bits

Master to Slave

Slave to Master

S = START condition

A = Acknowledge (low)

P = STOP condition

W = Write (low)

8-bits

Figure 12: Single Write Command

DA9080 also supports multiple byte writes, shown in Figure 13. By not sending the STOP command,

data is written to consecutive addresses.

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