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HMLQ25201T-R47MSR 数据表(PDF) 24 Page - Renesas Technology Corp |
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HMLQ25201T-R47MSR 数据表(HTML) 24 Page - Renesas Technology Corp |
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24 / 52 page ![]() DA9080 High Current, Highly Configurable System PMIC with Four Bucks and One LDO Datasheet Revision 1.2 08-Feb-2022 CFR0011-120-00 24 of 51 © 2022 Renesas Electronics 6 Functional States DA9080 functional states are shown in Figure 6. CPOR OTP OTPLOAD cpor_n cpor_n any state cpor_n • Digital core POR signal • NOT POR pin output. DEVI CE_READ DY Check VIN UVLO/OV Check OV/ UV Unmask GLOBAL_EN FAULT_SHUTDO WN = 0 FAULT Hiccup FAULT • VIN UVLO • OVP/UVP for BUCK • UVP for LDO • TSD FAULT including VI N_UVLO FAULT_SUTDOWN (to SEQ/ BUCK) = 1 FAULT Count 64 ms FAULT_SHUTDO WN = 1 OTP load done Analog Core active Not FAULT VI N CHECK uv_vin_n high (AND ov_vin Low) WaitBandGap Wait 30 µs acore_dout_bias_ ok(sync) == 0 Figure 6: FSM States 7 Sequencer 7.1 Functional Description DA9080 includes a sequencer to control the power-up and power-down behavior. Any number of voltage supplies (bucks and LDO) can be grouped and assigned to a sequencer slot; for example, PVIN1 and PVIN2 may both be assigned to slot one. Four sequencer slots are provided. When the sequencer starts all supplies in slot one are enabled. The sequencer then waits until all the enabled supplies have started correctly as confirmed by the corresponding power-good indicator (see Section 8.3). A blanking time is applied during supply startup to prevent fault conditions being registered. A delay, tPG, is applied between a supply starting correctly and that supply's power-good (PG) indicator being set. Once all the power-good indicators have been set in slot one, the sequencer moves to slot two and repeat the process. When all slots are completed, the power-up sequence is finished. If no supplies have been assigned to a slot then the slot completes immediately and the sequencer moves on to the next slot. For power-down the sequencer is run with reverse slot order. Supplies assigned to slot four are disabled first. When disabled, each buck ramps down the output voltage to the minimum code and then discharges using the internal pull-down resistor. As the LDO is unable to actively discharge its output voltage, when disabled, the LDO uses an internal pull-down resistor to discharge the output voltage. |
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