HMLQ25201T-R47MSR datasheet(34/52 Pages) RENESAS

34 / 52 page

DA9080

High Current, Highly Configurable System

PMIC with Four Bucks and One LDO

Datasheet

Revision 1.2

08-Feb-2022

CFR0011-120-00

34 of 51

SLAVEadr W

REGadr

DATA

7-bits

1-bit

adr=REGadr

8-bits

Master to Slave

Slave to Master

S = START condition

A = Acknowledge (low)

P = STOP condition

W = Write (low)

Sr = Repeated START condition

NA = No Acknowledge

8-bits MASTER Code = 0000 1XXX

8-bits

Repeated writes

adr=REGadr+1

adr=REGadr+2

DATA

8-bits

DATA

Figure 13: Consecutive Write Command

The data read protocol differs from the write protocol. A read does not have a register address

immediately preceding it. To read from a specific address, the register address is given by using a

write command followed by a Repeated START. A single-byte read is shown in Figure 14. A

Repeated START is followed by the slave address and a read bit. After the read data is returned to

the host, the host then responds with a Not Acknowledge and a STOP.

SLAVEadr

REGadr

DATA

7-bits

1-bit

8-bits

Master to Slave

Slave to Master

S = START condition

A = Acknowledge (low)

P = STOP condition

W = Write (low)

Sr = Repeated START condition

NA = Not Acknowledge

R = Read (Hgih)

SLAVEadr

7-bits

1-bit

adr=REGadr

Figure 14: Single Read Command

The DA9080 also supports a multiple byte read protocol. If the host responds to the returned data

with an Acknowledge rather than Not Acknowledge and STOP, data will be read from sequential

addresses until a Not Acknowledge and STOP command is given, as shown in Figure 15. If a read

address is given with a write and Repeated START, consecutive addresses are read from the write

address.

SLAVEadr W

REGadr

DATA

7-bits

1-bit

8-bits

Master to Slave

Slave to Master

S = START condition

A = Acknowledge (low)

P = STOP condition

W = Write (low)

Sr = Repeated START condition

NA = No Acknowledge

8-bits MASTER Code = 0000 1XXX

R = Read (Hgih)

7-bits

1-bit

adr=REGadr

8-bits

Repeated reads

adr=REGadr+1

adr=REGadr+2

SLAVEadr

DATA

Figure 15: Consecutive Read Command

HMLQ25201T-R47MSR 数据表(PDF) 34 Page - Renesas Technology Corp

HMLQ25201T-R47MSR 数据表(HTML) 34 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52

数据表下载

链接网址

HMLQ25201T-R47MSR 数据表(PDF) 34 Page - Renesas Technology Corp

HMLQ25201T-R47MSR 数据表(HTML) 34 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52

数据表 下载

链接网址

数据表下载