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SN250 数据表(PDF) 98 Page - STMicroelectronics |
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SN250 数据表(HTML) 98 Page - STMicroelectronics |
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98 / 130 page  Functional description—application modules SN250 98/130 7.4.6 Registers TMR1_CFG [0x450C] TMR1_CNT [0x4500] 15 0-R 14 0-R 13 0-R 12 0-RW 11 0-RW 10 0-RW 9 0-RW 8 0-RW 0 0 0 TMR_EXTEN TMR_EN TMR_BIDIR TMR_DOWN TMR_1SHOT TMR_PSCL TMR_FILT TMR_EDGE TMR_CLK 0-RW 7 0-RW 6 0-RW 5 0-RW 4 0-RW 3 0-RW 2 0-RW 1 0-RW 0 TMR_EXTEN [12] Control bit for the external enable mask on a pin. When this bit is clear, do not check status of the TMR1ENMSK pin. When this bit is set, check status of the TMR1ENMSK pin. TMR_EN [11] Set this bit to enable counting. To change other register bits, this bit must be cleared. TMR_BIDIR [10] Set this bit to enable bi-directional alternation mode. TMR_DOWN [9] Initial count direction after enabling the timer. Clear this bit to count up; set this bit to count down. TMR_1SHOT [8] Clear this bit for auto repetition mode. Set this bit for a single shot. TMR_PSCL [7:4] Clock divider setting (N). The possible clock divisors are: 0 − 2N (N = 0..10). TMR_FILT [3] Set this bit to enable clock source glitch filtering. TMR_EDGE [2] Clock source edge selection. Clear this bit for rising edge; set this bit for falling edge. TMR_CLK [1:0] Clock source selection: 0 = calibrated RC oscillator (default);1 = 32kHz; 2 = 12MHz; 3 = External (GPIO). 15 0-RW 14 0-RW 13 0-RW 12 0-RW 11 0-RW 10 0-RW 9 0-RW 8 0-RW TMR1_CNT TMR1_CNT 0-RW 7 0-RW 6 0-RW 5 0-RW 4 0-RW 3 0-RW 2 0-RW 1 0-RW 0 TMR1_CNT [15:0] Current Timer 1 counter value. When read, returns the current timer counter. When written, overwrites the timer counter and restarts wrap detection. |
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