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S29CD032J 数据表(PDF) 73 Page - SPANSION

部件名 S29CD032J
功能描述  32/16 Megabit CMOS 2.6 Volt or 3.3 Volt-only Simultaneous Read/Write, Dual Boot, Burst Mode Flash Memory with VersatileI/O
PDF  76 Pages
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制造商  SPANSION [SPANSION]
网页  http://www.spansion.com
标志 SPANSION - SPANSION

S29CD032J 数据表(HTML) 73 Page - SPANSION

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September 27, 2006 S29CD-J_CL-J_00_B1
S29CD-J & S29CL-J Flash Family
71
Da ta
Shee t
(Prelim i nar y )
21. Revision History
Section
Description
Revision A0 (March 1, 2005)
Initial release.
Revision A1 (April 15, 2005)
Ordering Information and Valid
Combinations tables
Updated to include lead Pb-free options.
Revision A2 (January 20, 2006)
Ordering Information
Added “Contact factory” for 75 MHz. Modified Ordering Options for Characters 15 & 16 to reflect
autoselect ID & top/bottom boot. Changed “N” for Extended Temperature Range to “M”.
Input/Output Descriptions
Removed Logic Symbol Diagrams.
Additional Resources
Added section.
Memory Address Map
Changed “Bank 2” to “Bank 1”.
Simultaneous Read/Write Operation
Removed Ordering Options Table (Tables 3 & 4).
Advanced Sector Protection/
Unprotection
Added Advanced Sector Protection/Unprotection figure. Added figures for PPB Erase & Program
Algorithm.
Electronic Marking
Added in Electronic Marking section.
Absolute Maximum Ratings
Modified VCC Ratings to reflect 2.6 V and 3.6 V devices. Modified VCC Ratings to reflect 16 Mb & 32
Mb devices.
AC Characteristics
Added Note “tOE during Read Array”.
Asynchronous Read Operation
Changed values of tAVAV, tAVQV, tELQV, tGLQV in table.
Conventional Read Operation Timings
Moved tDF line to 90% on the high-Z output in figure.
Burst Mode Read for 32 Mb & 16 Mb
Added tAAVS and tAAVH timing parameters to table. Changed tCH to tCLKH. Changed tCL to tCLKL.
Removed the following timing parameters:
•tDS (Data Setup to WE# Rising Edge)
•tDH (Data Hold from WE# Rising Edge)
•tAS (Address Setup to Falling Edge of WE#)
•tAH (Address Hold from Falling Edge of WE#)
•tCS (CE# Setup Time)
•tCH (CE# Hold Time)
•tACS (Address Setup Time to CLK)
•tACH (Address Hold Time from ADV# Rising Edge of CLK while ADV# is Low)
Burst Mode Read (x32 Mode)
Added the following timing parameters:
•tAAVS
•tDVCH
•tINDS
•tINDH
Asynchronous Command Write Timing
In figure, changed tOEH to tWEH; changed tWPH to tOEP.
Synchronous Command Write/Read
Timing
Removed tWADVH and tWCKS from figure.
WP# Timing
In figure, changed tCH to tBUSY
Erase/Program Operations
In table, added Note 3: Program/Erase parameters are the same regardless of synchronous or
asynchronous mode. Added tOEP (OE# High Pulse)
Alternative CE# Controlled Erase/
Program Operations
Removed tOES from table. Added tWADVS and tWCKS
Appendix 2: Command Definitions
Removed “or when device is in autoselect mode” from Note 14.
Revision B0 (June 12, 2006)
Global
Changed document status to Preliminary.
Distinctive Characteristics
Changed cycling endurance from typical to guaranteed.
Performance Characteristics
Updated Max Asynch. Access Time, Max CE# Access Time, and Max OE# Access time in table.
Ordering Information
Updated additional ordering options in designator breakout table. Updated valid combination tables.



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