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ADP1821ARQZ-R7 数据表(PDF) 5 Page - Analog Devices

部件名 ADP1821ARQZ-R7
功能描述  Step-Down DC-to-DC Controller
PDF  24 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP1821ARQZ-R7 数据表(HTML) 5 Page - Analog Devices

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ADP1821
Rev. B | Page 5 of 24
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
Rating
VCC, SHDN, SYNC, FREQ, COMP, SS, FB to
GND, PVCC to PGND, BST to SW
−0.3 V to +6 V
BST to GND
−0.3 V to +30 V
CSL to GND
−1 V to +30 V
DH to GND
(VSW − 0.3 V) to
(VBST + 0.3 V)
DL to PGND
−0.3 V to
(VPVCC + 0.3 V)
SW to GND
−2 V to +30 V
PGND to GND
±2 V
θJA, 2-Layer (SEMI Standard Board)
150°C/W
θJA, 4-Layer (JEDEC Standard Board)
105°C/W
Operating Ambient Temperature Range
−40°C to +85°C
Operating Junction Temperature Range
−55°C to +125°C
Storage Temperature Range
−65°C to +150°C
Maximum Soldering Lead Temperature
260°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other condition s above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Absolute maximum ratings apply individually only, not in
combination. Unless otherwise specified, all other voltages
are referenced to GND.
ESD CAUTION
SIMPLIFIED BLOCK DIAGRAM
THERMAL
SHUTDOWN
LOGIC
UVLO
OSCILLATOR
FAULT
S
R
Q
Q
PWM
VCC
FAULT
REFERENCE
THSD
UVLO
OV
0.6V
UV
0.8V
100kΩ
2.5kΩ
BST
DH
SW
PVCC
DL
PGND
CSL
PWGD
FB
SS
COMP
SYNC
FREQ
GND
VCC
ADP1821
SHDN
Figure 3. Simplified Block Diagram



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