ADP1821ARQZ-R7 datasheet(11/24 Pages) AD

11 / 24 page

ADP1821

Rev. B | Page 11 of 24

When an external clock is detected at the first SYNC edge,

the internal oscillator is reset and clock control shifts to SYNC.

The SYNC edges then trigger subsequent clocking of the PWM

outputs. The DH rising edges appear about 320 ns after the cor-

responding SYNC edge, and the frequency is locked to the

external signal. If the external SYNC signal disappears during

operation, the ADP1821 reverts to its internal oscillator and

experiences a delay of no more than a single cycle of the

internal oscillator.

COMPENSATION

The control loop is compensated by an external series RC

network from COMP to FB and sometimes requires a series

RC in parallel with the top voltage divider resistor. COMP is

the output of the internal error amplifier.

The internal error amplifier compares the voltage at FB to the

internal 0.6 V reference voltage. The difference between the two

(the feedback voltage error) is amplified by the error amplifier.

To optimize the ADP1821 for stability and transient response

for a given set of external components and input/output voltage

conditions, choose the compensation components carefully. For

more information on choosing the compensation components,

see the Compensating the Voltage Mode Buck Regulator

section.

POWER-GOOD INDICATOR

The ADP1821 features an open-drain, power-good output

(PWGD) that sinks current when the output voltage drops 8.3%

below or 25% above the nominal regulation voltage. Two com-

parators measure the voltage at FB to set these thresholds. The

PWGD comparator directly monitors FB, and the threshold is

fixed at 0.55 V for undervoltage and 0.75 V for overvoltage. The

PWGD output also sinks current if an over temperature or input

undervoltage condition is detected and is operational with VCC

voltage as low as 1.0 V.

Use this output as a logical power-good signal by connecting a

pull-up resistor from PWGD to an appropriate supply voltage.

THERMAL SHUTDOWN

The ADP1821 controller does not generate much heat under

normal conditions, even when driving a relatively large MOSFET.

However, the surrounding power components or other circuits

on the same PCB could heat up the PCB to an unsafe operating

temperature. The ADP1821 controller goes into shutdown and

shuts off the gate drivers when its junction temperature reaches

about 145°C. When the junction temperature drops below

about 135°C, the ADP1821 resumes normal operation in a soft

start mode.

SHUTDOWN CONTROL

The ADP1821 dc-to-dc converter features a low-power shut-

down mode that reduces quiescent supply current to 1 μA. To

shut down the ADP1821, drive SHDN low. To turn it on, drive

SHDN high. For automatic startup, connect SHDN to VCC.

ADP1821ARQZ-R7 数据表(PDF) 11 Page - Analog Devices

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