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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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ES9822PRO 数据表(PDF) 65 Page - ESS Technology,Inc |
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ES9822PRO 数据表(HTML) 65 Page - ESS Technology,Inc |
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65 / 126 page  0.3 ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 WWW.ESSTECH.COM 65 ES9822 PRO Product Datasheet ASP Registers Register 35: ASP1 CONFIG Bits [7:6] [5:1] [0] Default 2'b00 5'd0 1'b0 Bits Mnemonic Description [7:6] RESERVED NA [5:1] SELECT_ASP1_NUM Whole number divide value + 1 for ASP1 clock (SYS_CLK/divide_value). • 5'd0: Whole number divide value + 1 = 1 (default) • 5'd1: Whole number divide value + 1 = 2 • 5'd31: Whole number divide value + 1 = 32 [0] ENABLE_ASP1_CLK Enables ASP1 clock. • 1'b0: Disabled (default) • 1'b1: Enabled Register 36: ASP2 CONFIG Bits [7:6] [5:1] [0] Default 2'b00 5'd0 1'b0 Bits Mnemonic Description [7:6] RESERVED NA [5:1] SELECT_ASP2_NUM Whole number divide value + 1 for ASP2 clock (SYS_CLK/divide_value). • 5'd0: Whole number divide value + 1 = 1 (default) • 5'd1: Whole number divide value + 1 = 2 • 5'd31: Whole number divide value + 1 = 32 [0] ENABLE_ASP2_CLK Enables ASP2 clock. • 1'b0: Disabled (default) • 1'b1: Enabled |
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